On Tue, Aug 04, 2020 at 09:53:04AM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - add DM based reset driver for SiFive SoC's.
>
> Thanks
> Rick
>
> https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/714339244
>
> The following changes since
On Fri, Jul 24, 2020 at 03:18:45PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - Fix SiFive HiFive Unleashed board booting failure problem.
> - Enable SiFive fu540 PWM driver.
> - Support SiFive fu540: SPI boot.
> - Update OpenSBI used for RISC-V CI
On Fri, Jul 03, 2020 at 03:44:47PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> This is version two of PR send by 7/2
>
> Drop patchs about sysreset
> [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask
> property
> [PATCH 2/5] sysreset: syscon: Support value
Hi Rick,
On Fri, Jul 3, 2020 at 2:01 PM Rick Chen wrote:
>
> > From: Tom Rini [mailto:tr...@konsulko.com]
> > Sent: Thursday, July 02, 2020 9:53 PM
> > To: Open Source Project uboot
> > Cc: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志)
> > Subject: Re: [U-Boot]
> From: Tom Rini [mailto:tr...@konsulko.com]
> Sent: Thursday, July 02, 2020 9:53 PM
> To: Open Source Project uboot
> Cc: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志)
> Subject: Re: [U-Boot] Pull request: u-boot-riscv/master
>
> On Thu, Jul 02, 2020 at 10:51:48AM +0800, ub..
On Thu, Jul 02, 2020 at 10:51:48AM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - sbi: Add newline to error message
> - fu540: dts: Correct reg size of otp and dmc nodes
> - Enhance reserved memory fixup about PMP information passed from OpenSbi
> -
On 5/26/20 3:41 AM, Rick Chen wrote:
> Hi Tom
>
>> From: Tom Rini [mailto:tr...@konsulko.com]
>> Sent: Monday, May 25, 2020 11:40 PM
>> To: Open Source Project uboot
>> Cc: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志)
>> Subject: Re: [U-Boot] Pull request: u
Hi Tom
> From: Bin Meng [mailto:bmeng...@gmail.com]
> Sent: Wednesday, June 24, 2020 10:58 AM
> To: Open Source Project uboot
> Cc: Tom Rini; U-Boot Mailing List; Rick Jian-Zhi Chen(陳建志)
> Subject: Re: [U-Boot] Pull request: u-boot-riscv/master
>
> Hi Rick,
>
> On We
Hi Rick,
On Wed, Jun 24, 2020 at 10:41 AM wrote:
>
> Hi Tom,
>
> Please pull some riscv updates:
>
> - fu540: dts: Correct reg size of otp and dmc nodes
> - sbi: Add newline to error message
> - sifive/fu540: Enable SPI-NOR support
>
> Thanks
> Rick
>
>
> > > Cc: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志)
> > > Subject: Re: [U-Boot] Pull request: u-boot-riscv/master
> > >
> > > On Mon, May 25, 2020 at 04:01:08PM +0800, ub...@andestech.com wrote:
> > >
> > > > Hi Tom,
> > > >
>
Rick Jian-Zhi Chen(陳建志)
> > > Subject: Re: [U-Boot] Pull request: u-boot-riscv/master
> > >
> > > On Mon, May 25, 2020 at 04:01:08PM +0800, ub...@andestech.com wrote:
> > >
> > > > Hi Tom,
> > > >
> > > > Please pull some ris
On Mon, Jun 22, 2020 at 02:03:52PM +0800, Rick Chen wrote:
> Hi Tom
>
> > From: Tom Rini [mailto:tr...@konsulko.com]
> > Sent: Monday, May 25, 2020 11:40 PM
> > To: Open Source Project uboot
> > Cc: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志)
> > Subject: Re:
Hi Tom
> From: Tom Rini [mailto:tr...@konsulko.com]
> Sent: Monday, May 25, 2020 11:40 PM
> To: Open Source Project uboot
> Cc: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志)
> Subject: Re: [U-Boot] Pull request: u-boot-riscv/master
>
> On Mon, May 25, 2020 at 04:01:08PM +0800
On Thu, Jun 04, 2020 at 10:18:07AM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - Fixes 7e249bc13aaf: ("riscv: Move all SMP related SBI calls to SBI_v01")
>Move sbi_probe_extension() out of CONFIG_SBI_V01.
> - SiFive FU540 support SPL.
>
> Thanks
>
On Tue, May 26, 2020 at 04:31:43PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - sifive: fix palmer's email address.
> - Move all SMP related SBI calls to SBI_v01.
>
> Thanks
> Rick
>
>
> The following changes since commit
Hi Tom
> From: Tom Rini [mailto:tr...@konsulko.com]
> Sent: Monday, May 25, 2020 11:40 PM
> To: Open Source Project uboot
> Cc: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志)
> Subject: Re: [U-Boot] Pull request: u-boot-riscv/master
>
> On Mon, May 25, 2020 at 04:01:08PM +0800
On Mon, May 25, 2020 at 04:01:08PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - Add Sipeed Maix support.
> - sifive: fix palmer's email address.
> - Move all SMP related SBI calls to SBI_v01.
>
>
On Thu, Apr 23, 2020 at 04:25:55PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - Adds few DT related fixes required for Linux EFI stub to work on RISC-V.
> - Makes SBI v0.2 the default SBI version to work with OpenSBI v0.7.
> - Revert "riscv: qemu: clear
On Tue, Mar 17, 2020 at 04:03:57PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - Fix sbi_remote_sfence_vma{,_asid}.
> - Avoid calling sbi_clear_ipi().
> - Add new SBI v0.2 extensions support.
>
>
On Mon, Feb 10, 2020 at 03:29:56PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - Fix ax25-ae350.rst document.
> - Refine RISC-V linker script and start.S.
> - Add option to print more information on exception.
>
>
On Tue, Dec 10, 2019 at 09:05:59AM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - Increase stack size to avoid a stack overflow during distro boot.
> - Add hifive-unleashed-a00.dts for SIFIVE FU540.
> - Add OF_SEPARATE support for SIFIVE FU540.
> - Add SPL
On Fri, Oct 18, 2019 at 03:00:07PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - Support sifive DM based gpio driver for FU540-SoC.
> - Align boot image header with Linux v5.3
>
> https://travis-ci.org/rickchen36/u-boot-riscv/builds/599424917
>
> Thanks
On Tue, Sep 03, 2019 at 10:15:42AM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - Skip unavailable hart in the get_count().
> - fu540 set serial env from otp.
> - fu540 add mmc0 as a boot target device.
> - Update fix_rela_dyn and add absolute reloc
On Mon, Aug 26, 2019 at 04:25:31PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - Support SPL and OpenSBI (FW_DYNAMIC firmware) boot.
> - Fix qemu kconfig build warning.
>
> https://travis-ci.org/rickchen36/u-boot-riscv/builds/576608303
>
> Thanks
> Rick
> > > Sent: Wednesday, August 14, 2019 12:50 AM
> > > > > To: Open Source Project uboot
> > > > > Cc: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志)
> > > > > Subject: Re: [U-Boot] Pull request: u-boot-riscv/master
> > > > >
> >
2:50 AM
> > > > To: Open Source Project uboot
> > > > Cc: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志)
> > > > Subject: Re: [U-Boot] Pull request: u-boot-riscv/master
> > > >
> > > > On Mon, Aug 12, 2019 at 06:23:02PM +0800,
On Fri, Aug 16, 2019 at 01:19:59PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - Fix sifive serial y-modem transfer.
> - Access CSRs using CSR numbers.
> - Update doc sifive-fu540
> - Support big endian hosts and target.
>
>
Chen(陳建志)
> > > Subject: Re: [U-Boot] Pull request: u-boot-riscv/master
> > >
> > > On Mon, Aug 12, 2019 at 06:23:02PM +0800, ub...@andestech.com wrote:
> > >
> > > > Hi Tom,
> > > >
> > > > Please pull some riscv updates:
&g
Hi Lukas
> > From: Tom Rini [mailto:tr...@konsulko.com]
> > Sent: Wednesday, August 14, 2019 12:50 AM
> > To: Open Source Project uboot
> > Cc: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志)
> > Subject: Re: [U-Boot] Pull request: u-boot-riscv/master
> >
&g
On Mon, Aug 12, 2019 at 06:23:02PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - Fix sifive serial y-modem transfer.
> - Access CSRs using CSR numbers.
> - Update doc sifive-fu540
> - Support big endian hosts and target.
> - Support SPL and OpenSBI
On Fri, Jul 19, 2019 at 03:06:24PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - Update SiFive Unleashed clock driver.
> - Enables SiFive SPI driver and MMC SPI driver for SiFive Unleashed board
>
>
On Wed, Jun 05, 2019 at 06:27:38PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - Support Microchip MPFS Icicle board.
> - Enable e1000 and nvme support for qemu.
> - Enable PCI host ECAM generic driver for qemu.
> - Increase the environment size to 128kB
On Thu, May 09, 2019 at 05:08:08PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - Correct SYS_TEXT_BASE for qemu.
> - Support booti.
> - Increase SYSBOOTM_LEN for Fedora/RISCV kernel.
> - Support SMP booting from flash.
>
>
On Mon, Apr 08, 2019 at 02:46:54PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> 1. RISC-V arch support SMP.
> 2. Support Andestech's PLIC and PLMT.
> 2. qemu, fu54e, ae350 boards enable SMP by default.
> 3. Fix CONFIG_DEFAULT_DEVICE_TREE failure.
>
>
On Wed, Feb 27, 2019 at 01:39:44PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> SiFive FU540 Support
>
> https://travis-ci.org/rickchen36/u-boot-riscv/builds/499037971
>
> Thanks
> Rick
>
>
> The following changes since commit
On Tue, Jan 15, 2019 at 03:16:39PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
> 1. Improve cache implementation.
> 2. Fix and improve standalone applications
>
> https://travis-ci.org/rickchen36/u-boot-riscv/builds/479684449
>
> Thanks
>
> Rick
>
>
> The
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