On Mon, Aug 4, 2008 at 9:02 PM, Becky Bruce [EMAIL PROTECTED] wrote:
Currently, they use CONFIG_NUM_CPUS, which is different than
85xx for no good reason.
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -17,7 +17,7 @@
#define CONFIG_MPC86xx 1 /*
On Wed, Jul 16, 2008 at 2:17 PM, richardretanubun
[EMAIL PROTECTED] wrote:
Hi,
I am wondering if the miiphy command support for QE UEC is already
merged into u-boot on some tree.
The last info I have on this patch is on this posting:
Anyway, I'll wait for Kim's ACK before pushing it up into my dev-1.3.4 branch
see:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/38991
David, I'm still waiting for a response to Kim's comments before I can
apply this. The window for 1.3.5 will open soon, so it'd be good to
get a
I'm currently pulling together some patches. I will send the pull
request *today*
On Mon, Jul 14, 2008 at 4:12 PM, Wolfgang Denk [EMAIL PROTECTED] wrote:
Hi everybody,
from my point of view I think we're ready for a -rc1 prerelease, but I
am aware that some patches are still pending in the
On Tue, Jun 17, 2008 at 5:45 PM, Kim Phillips
[EMAIL PROTECTED] wrote:
Signed-off-by: Kim Phillips [EMAIL PROTECTED]
Applied, thanks!
I also applied 2/2, since it appears the order needs to be reversed,
and it just makes things easier.
Andy
On Wed, Jul 2, 2008 at 9:11 AM, Andrew Klossner
[EMAIL PROTECTED] wrote:
From 03e28f90637703aaef9356dc398adedcdf06cb94 Mon Sep 17 00:00:00 2001
From: Andrew Klossner [EMAIL PROTECTED]
Date: Wed, 2 Jul 2008 07:03:53 -0700
Subject: [PATCH] Change the temp map to ROM to align addresses to page
On Wed, Jul 2, 2008 at 9:48 AM, Kumar Gala [EMAIL PROTECTED] wrote:
On Jul 2, 2008, at 9:25 AM, Andrew Klossner wrote:
The MPC8555E and MPC8548E reference manuals are quite specific about
the formula required to change the value of CCSRBAR. This patch
implements that formula.
Just to be
On Wed, Jul 9, 2008 at 4:53 PM, Kim Phillips [EMAIL PROTECTED] wrote:
On Wed, 9 Jul 2008 14:43:46 -0400
Paul Gortmaker [EMAIL PROTECTED] wrote:
Some boards that have external 16550 UARTs don't have a direct
tie between bi_busfreq and the clock used for the UARTs. Boards
that do have such a
On Mon, Jul 14, 2008 at 5:54 AM, Sebastian Siewior
[EMAIL PROTECTED] wrote:
The default value for the MxMR register is not always the right one.
This patch adds the value of MxMR register as an additional
parameter (plus a few defines instead of hex coded values).
Signed-off-by: Sebastian
On Fri, Jul 11, 2008 at 2:33 PM, Paul Gortmaker
[EMAIL PROTECTED] wrote:
The definitions for the TSEC have become out of date. There is no
longer any such options like CONFIG_MPC85xx_TSEC1 or similar.
Update to match those of other boards, like the MPC8560ADS.
Signed-off-by: Paul Gortmaker
On Fri, Jul 11, 2008 at 5:03 PM, Paul Gortmaker
[EMAIL PROTECTED] wrote:
Wolfgang Denk wrote:
+ * MAC addresses directly on it.
+ */
+#if 0
+#define CONFIG_ETHADDR 00:01:af:07:9b:8a
+#define CONFIG_ETH1ADDR 00:01:af:07:9b:8b
#define CONFIG_SERVERIP
On Fri, Jul 11, 2008 at 2:33 PM, Paul Gortmaker
[EMAIL PROTECTED] wrote:
The sbc8560 board ships with 512MB of memory installed,
but the current cs0_bnds is hard coded for 256MB. Set the
value based on CFG_SDRAM_SIZE.
Signed-off-by: Paul Gortmaker [EMAIL PROTECTED]
Applied, thanks
Andy
On Fri, Jul 11, 2008 at 2:33 PM, Paul Gortmaker
[EMAIL PROTECTED] wrote:
Add in for the sbc8560, the ft_board_setup() routine, based on what is
in use for the Freescale MPC8560ADS board.
Signed-off-by: Paul Gortmaker [EMAIL PROTECTED]
Applied, thanks
Andy
On Fri, Jul 11, 2008 at 2:33 PM, Paul Gortmaker
[EMAIL PROTECTED] wrote:
Make the default build for the sbc8560 board be powerpc
capable with libfdt support.
Signed-off-by: Paul Gortmaker [EMAIL PROTECTED]
Applied, thanks
Andy
On Mon, Jul 14, 2008 at 2:07 PM, Kumar Gala [EMAIL PROTECTED] wrote:
The L2 size detection code was a bit confusing and we kept having to add
code to it to handle new processors. Change the sense of detection so we
look for the older processors that aren't changing.
Also added support for 1M
On Mon, Jul 14, 2008 at 2:07 PM, Kumar Gala [EMAIL PROTECTED] wrote:
Signed-off-by: Kumar Gala [EMAIL PROTECTED]
Applied, thanks
Andy
-
This SF.Net email is sponsored by the Moblin Your Move Developer's challenge
Build the
On Mon, Jul 14, 2008 at 2:07 PM, Kumar Gala [EMAIL PROTECTED] wrote:
Add support for using a PCIe ATI Video card on PCIe2.
Signed-off-by: Kumar Gala [EMAIL PROTECTED]
Applied, thanks
Andy
-
This SF.Net email is sponsored
are available in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git master
Andrew Klossner (1):
Change the temp map to ROM to align addresses to page size.
Andy Fleming (4):
Remove LBC_CACHE_BASE from 8544 DS
Fix indentation for default boot environment
The LMB code now uses phys_addr_t and phys_size_t. Also, there were a couple
of casting problems in the bootm code that called the LMB functions.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
include/lmb.h |2 +-
lib_generic/lmb.c |6 +++---
lib_ppc/bootm.c |5 +++--
3
On Fri, Jun 27, 2008 at 4:37 AM, Frank Prepelica
[EMAIL PROTECTED] wrote:
Hi Ben,
The ethernet adapter (PCMCIA ethernet card) which is directly connect to the
board can be forced in windows to use 100Mbit full duplex, but u-boot still
use 1Gbit. It's a Marvell phy, the exact phy description
lmb_free allows us to unreserve some memory so we can use lmb_alloc_base or
lmb_reserve to temporarily reserve some memory.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
Rebased off the top of tree to ease application.
lib_generic/lmb.c | 49
ALIGN() returns the smallest aligned value greater than the passed
in address or size. Taken from Linux.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
Rebased off the top of tree to ease application.
include/common.h |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git
__lmb_alloc_base can underflow if it fails to find free space. This was fixed
in linux with commit d9024df02ffe74d723d97d552f86de3b34beb8cc. This patch
merely updates __lmb_alloc_base to resemble the current version in Linux.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
Rebased off the top
CFG_FDT_PAD bytes to the size.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
Rebased off the top of tree to ease application.
lib_ppc/bootm.c | 66 --
1 files changed, 58 insertions(+), 8 deletions(-)
diff --git a/lib_ppc/bootm.c b/lib_ppc
deemed best.
Andy Fleming (1):
socrates: Fix PCI clk fix patch
Anton Vorontsov (2):
83xx/85xx/86xx: factor out Freescale Localbus defines out of mpc83xx.h
83xx/85xx: further localbus cleanups
Becky Bruce (1):
MPC85xx: Change traps.c to not reference non-addressable memory
are available in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git master
A re-send, since I accidentally undid a bunch of changes before I sent the
last pull request. This one has been build-tested.
Andy Fleming (1):
socrates: Fix PCI clk fix patch
Anton Vorontsov
On Mon, May 19, 2008 at 11:05 AM, David Saada [EMAIL PROTECTED] wrote:
Add support for UPM configuration on the 85xx platform.
In addition, on the MPC83xx, remove MPC834x precompiler condition, in order
to support all MPC83xx processors.
Signed-off-by: David Saada [EMAIL PROTECTED]
David, I
On Thu, May 29, 2008 at 11:22 AM, Kumar Gala [EMAIL PROTECTED] wrote:
Signed-off-by: Kumar Gala [EMAIL PROTECTED]
Applied, thanks
Andy
-
Check out the new SourceForge.net Marketplace.
It's the best place to buy or sell
/string.h. It doesn't look like we need the u-boot one if
we're building for the host, so now we only include when building inside
u-boot.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
lib_generic/md5.c |2 +-
lib_generic/sha1.c |2 +-
2 files changed, 2 insertions(+), 2 deletions
On Sat, Jun 7, 2008 at 10:02 AM, Sergei Poselenov
[EMAIL PROTECTED] wrote:
Hello,
+#include asm/io.h
+
+int state;
Can that variable be made static?
Regards, Magnus
Yes, it can.
Wolfgang, what is the best way to handle this? Should I re-do the
patch?
I have made the change in my
On Thu, May 29, 2008 at 1:21 AM, Kumar Gala [EMAIL PROTECTED] wrote:
Signed-off-by: Kumar Gala [EMAIL PROTECTED]
---
Fix warning that the first version introduced.
applied, gracias
-
Check out the new SourceForge.net
On Mon, Jun 2, 2008 at 6:22 PM, Andy Fleming [EMAIL PROTECTED] wrote:
On Wed, May 28, 2008 at 12:53 PM, [EMAIL PROTECTED] wrote:
From: Wolfgang Grandegger [EMAIL PROTECTED]
Move all TQM board directories to the vendor specific directory tqc
for modules from TQ-Components GmbH (http
On Thu, May 29, 2008 at 11:22 AM, Kumar Gala [EMAIL PROTECTED] wrote:
Signed-off-by: Kumar Gala [EMAIL PROTECTED]
---
cpu/mpc85xx/fdt.c | 128
+
1 files changed, 128 insertions(+), 0 deletions(-)
diff --git a/cpu/mpc85xx/fdt.c
On Wed, May 14, 2008 at 1:10 PM, [EMAIL PROTECTED] wrote:
From: Becky Bruce [EMAIL PROTECTED]
Currently, END_OF_RAM is used by the trap code to determine if
we should attempt to access the stack pointer or not. However,
on systems with a lot of RAM, only a subset of the RAM is
guaranteed to
On Wed, May 28, 2008 at 1:12 PM, Wolfgang Grandegger [EMAIL PROTECTED] wrote:
The boot output is now aligned poperly with other boot output
lines, e.g.:
FLASH: 128 MB
L2:512 KB enabled
Signed-off-by: Wolfgang Grandegger [EMAIL PROTECTED]
A silly comment, but let's spell it Beautify
ALIGN() returns the smallest aligned value greater than the passed
in address or size. Taken from Linux.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
include/common.h |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/include/common.h b/include/common.h
index
ALIGN() returns the smallest aligned value greater than the passed
in address or size. Taken from Linux.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
include/common.h |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/include/common.h b/include/common.h
index
lmb_free allows us to unreserve some memory so we can use lmb_alloc_base or
lmb_reserve to temporarily reserve some memory.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
lib_generic/lmb.c | 49 +
1 files changed, 49 insertions(+), 0 deletions
__lmb_alloc_base can underflow if it fails to find free space. This was fixed
in linux with commit d9024df02ffe74d723d97d552f86de3b34beb8cc. This patch
merely updates __lmb_alloc_base to resemble the current version in Linux.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
lib_generic/lmb.c
CFG_FDT_PAD bytes to the size.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
lib_ppc/bootm.c | 66 --
1 files changed, 58 insertions(+), 8 deletions(-)
diff --git a/lib_ppc/bootm.c b/lib_ppc/bootm.c
index 9194fd8..85e959a 100644
--- a/lib_ppc
On Tue, May 20, 2008 at 3:18 PM, Andy Fleming [EMAIL PROTECTED] wrote:
ALIGN() returns the smallest aligned value greater than the passed
in address or size. Taken from Linux.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
Shoot, let me do that again with numbering. If they are applied out
ALIGN() returns the smallest aligned value greater than the passed
in address or size. Taken from Linux.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
include/common.h |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/include/common.h b/include/common.h
index
lmb_free allows us to unreserve some memory so we can use lmb_alloc_base or
lmb_reserve to temporarily reserve some memory.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
lib_generic/lmb.c | 49 +
1 files changed, 49 insertions(+), 0 deletions
CFG_FDT_PAD bytes to the size.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
lib_ppc/bootm.c | 66 --
1 files changed, 58 insertions(+), 8 deletions(-)
diff --git a/lib_ppc/bootm.c b/lib_ppc/bootm.c
index 9194fd8..85e959a 100644
--- a/lib_ppc
__lmb_alloc_base can underflow if it fails to find free space. This was fixed
in linux with commit d9024df02ffe74d723d97d552f86de3b34beb8cc. This patch
merely updates __lmb_alloc_base to resemble the current version in Linux.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
lib_generic/lmb.c
are available in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git master
Andy Fleming (1):
85xx: Limit CPU2 workaround to parts that have the errata
board/freescale/mpc8548cds/mpc8548cds.c |7 ++-
1 files changed, 6 insertions(+), 1 deletions
Signed-off-by: Ebony Zhu [EMAIL PROTECTED]
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
board/freescale/mpc8548cds/mpc8548cds.c |7 ++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c
b/board/freescale/mpc8548cds/mpc8548cds.c
On Tue, Apr 29, 2008 at 1:58 AM, Andre Schwarz
[EMAIL PROTECTED] wrote:
Andy,
thanks for your comments.
Andy Fleming schrieb:
On Thu, Apr 24, 2008 at 9:45 AM, Andre Schwarz
[EMAIL PROTECTED] wrote:
{MIIM_VSC8601_EPHY_CON,MIIM_VSC8601_EPHY_CON_INIT_SKEW,NULL
are available in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git master
Kumar Gala (1):
85xx: Additional fixes and cleanup of MP code
cpu/mpc85xx/mp.c |6 +-
cpu/mpc85xx/release.S |3 ++-
2 files changed, 7 insertions(+), 2 deletions(-)
are available in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git master
Kumar Gala (3):
85xx: Additional fixes and cleanup of MP code
85xx/86xx: Rename DDR init address and init extended address register
85xx/86xx: Rename ext_refrec to timing_cfg_3 to match
with valid values 0-3 giving 0.0, 1.4,1.7 and 2.0ns delay.
Signed-off-by: Andre Schwarz [EMAIL PROTECTED]
Acked-by: Andy Fleming [EMAIL PROTECTED]
-
This SF.net email is sponsored by the 2008 JavaOne(SM) Conference
Don't
On Thu, Apr 24, 2008 at 9:45 AM, Andre Schwarz
[EMAIL PROTECTED] wrote:
{MIIM_VSC8601_EPHY_CON,MIIM_VSC8601_EPHY_CON_INIT_SKEW,NULL},
+#if defined(CFG_VSC8601_SKEW_TX) defined(CFG_VSC8601_SKEW_RX)
+{MIIM_EXT_PAGE_ACCESS,1,NULL},
+#define VSC8101_SKEW
PROTECTED]
Signed-off-by: Kumar Gala [EMAIL PROTECTED]
Acked-by: Andy Fleming [EMAIL PROTECTED]
Andy
-
This SF.net email is sponsored by the 2008 JavaOne(SM) Conference
Don't miss this year's exciting event. There's still time
On Fri, Apr 18, 2008 at 11:29 AM, Kumar Gala [EMAIL PROTECTED] wrote:
The cpu-release-addr is defined as always being a 64-bit quanity regardless
if we are running on a 32-bit or 64-bit machine.
Applied, thanks.
-
This
On Fri, Apr 18, 2008 at 4:28 PM, Kumar Gala [EMAIL PROTECTED] wrote:
eg. because of rounding error we can get 799Mhz instead of 800Mhz.
Signed-off-by: Dejan Minic [EMAIL PROTECTED]
Signed-off-by: Srikanth Srinivasan [EMAIL PROTECTED]
Signed-off-by: Kumar Gala [EMAIL PROTECTED]
Applied,
On Tue, Apr 15, 2008 at 5:18 AM, Pierre Savary [EMAIL PROTECTED] wrote:
Then my MMC 4GB works with my Linux kernel but if I can't load my kernel
(located on the first part of this MMC) ... it's not really interesting :(
So, somebody does already use MMC v4 with U-boot???
I've got one that
On Sun, Mar 30, 2008 at 8:45 AM, David Saada [EMAIL PROTECTED] wrote:
On the MPC83xx MPC85xx architectures that have QE, add initial data to the
pin configuration table (qe_iop_conf_tab). This is relevant for GPIO pins
defined as output. One can setup a value of -1 to leave the value
are available in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git master
Kumar Gala (2):
85xx: Use SVR_SOC_VER instead of SVR_VER
85xx: Fix detection of MP cpu spin up
cpu/mpc85xx/cpu_init.c |2 +-
cpu/mpc85xx/mp.c|6 +-
cpu/mpc85xx/spd_sdram.c
On Thu, Apr 3, 2008 at 1:36 PM, Scott Wood [EMAIL PROTECTED] wrote:
On Thu, Apr 03, 2008 at 08:26:23PM +0200, Wolfgang Denk wrote:
In message [EMAIL PROTECTED] you wrote:
I think this makes sense for code that we for example link from host's
standard libraries. But for code
Some systems have md5.h installed in /usr/include/. This isn't the desired
file (we want the one in include/md5.h). This will avoid the conflict.
This fixes the host tools building problem
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
This fixes the problem for me, at least...
common
cat /etc/redhat-release
Red Hat Enterprise Linux WS release 3 (Taroon Update 6)
On Wed, Apr 2, 2008 at 4:50 PM, Kumar Gala [EMAIL PROTECTED] wrote:
On Apr 2, 2008, at 4:19 PM, Andy Fleming wrote:
Some systems have md5.h installed in /usr/include/. This isn't the
desired
file (we
On Tue, Apr 1, 2008 at 8:33 AM, Andre Schwarz
[EMAIL PROTECTED] wrote:
Tor,
after investigating the tsec code I'm wondering how your PHY works in
RGMII mode ...
I think that there are some things missing, e.g. taking RGMII into
account during tsec_init.
/* Init ECNTRL */
On Tue, Apr 1, 2008 at 9:08 AM, Andre Schwarz
[EMAIL PROTECTED] wrote:
Tor,
after investigating the tsec code I'm wondering how your PHY works in
RGMII mode ...
I think that there are some things missing, e.g. taking RGMII into
account during tsec_init.
/* Init ECNTRL */
On Mon, Mar 31, 2008 at 7:13 AM, David Saada [EMAIL PROTECTED] wrote:
+
+void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int
assign,
You are going to find it very hard to get patches accepted if you
can't find a way to send without line wrap errors.
Andy
PROTECTED]
[EMAIL PROTECTED] {
interrupts = 0x21 0x2 0x22 0x2 0x24 0x2;
};
Lastly, the fdt print code was rearranged slightly to print arrays of cells
if the length of the property is a multiple of 4 bytes, and to not print
leading zeros.
Signed-off-by: Andy Fleming [EMAIL PROTECTED
On Fri, Mar 28, 2008 at 9:46 AM, David Saada [EMAIL PROTECTED] wrote:
Wolfgang Denk wrote:
Hi everybody,
MPC85xx, MPC83xx: Add/Fix UPM configuration support
QE IO: Add initial data to pin configuration + read/write functions
QE UEC: Add MII Commands
QE UEC: Extend number of supported
On Tue, Mar 25, 2008 at 11:33 AM, Stefan Roese [EMAIL PROTECTED] wrote:
On Tuesday 25 March 2008, Andy Fleming wrote:
I thought about this some more, and the problem is that cpu_eth_init()
and board_eth_init() are mutually exclusive, with board_eth_init() having
a higher priority. I
On Mon, Mar 10, 2008 at 9:17 AM, Ben Warren [EMAIL PROTECTED] wrote:
Hi Alex,
+extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
+
+#ifdef CONFIG_CMD_NET
+void hammerhead_eth_initialize(bd_t *bi)
+{
+ macb_eth_initialize(0, (void *)MACB0_BASE,
Ok closer look revealed this entry.
== tlb.c snip ===
/*
* TLB 6: 64M Cacheable, non-guarded
* 0xf000_ 64M LBC SDRAM
*/
SET_TLB_ENTRY(1, CFG_LBC_CACHE_BASE,
On Tue, Mar 11, 2008 at 1:30 PM, Eran Liberty [EMAIL PROTECTED] wrote:
Hi Andy,
I am bringing us back online as I think your insights might enlighten
others who might be googleing for answers. (I know i try my best when
faced with problems)
Oops, yes. I hit the wrong button. I meant to
.
The following changes since commit b29661fc115106454288051bc9a488351ce8:
Wolfgang Denk (1):
Coding style cleanup. Prepare v1.3.2-rc2 release candidate
are available in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git master
Andy Fleming (2):
Invalidate INIT_RAM TLB
On Tue, Feb 19, 2008 at 10:43 PM, Kumar Gala [EMAIL PROTECTED] wrote:
There is no reason to icbi when invalidating the temporary stack in
the d-cache. Its impossible on e500 to have the i-cache contain
any addresses in the temp stack and it can be problematic in generating
transactions on
On Tue, Feb 12, 2008 at 9:32 AM, Kumar Gala [EMAIL PROTECTED] wrote:
From: James Yang
Speed up get_tbclk() by referencing pre-computed bus clock
frequency value from global data instead of sys_info_t. Fix
rounding of result to nearest; previously it was rounding
upwards.
On Tue, Feb 12, 2008 at 9:33 AM, Kumar Gala [EMAIL PROTECTED] wrote:
From: James Yang
Show the DDR memory data rate in addition to the memory clock
frequency. For DDR/DDR2 memories the memory data rate is 2x the
memory clock.
Signed-off-by: James Yang
Signed-off-by: Kumar Gala [EMAIL
On Tue, Feb 12, 2008 at 9:57 AM, Kumar Gala [EMAIL PROTECTED] wrote:
From: James Yang
get_ddr_freq() and get_bus_freq() used get_sys_info() each time they were
called. However, get_sys_info() recalculates extraneous information when
called each time. Have get_ddr_freq() and
On Tue, Feb 12, 2008 at 4:57 PM, Kumar Gala [EMAIL PROTECTED] wrote:
Signed-off-by: James Yang [EMAIL PROTECTED]
Signed-off-by: Jon Loeliger [EMAIL PROTECTED]
Signed-off-by: Kumar Gala [EMAIL PROTECTED]
Applied to for-1.3.3, thanks
On Sun, Feb 24, 2008 at 7:30 AM, [EMAIL PROTECTED] wrote:
Hi
Quoting Michael Schwingen [EMAIL PROTECTED]:
If yes, you simply need to define the right PHY address in your board
config, and it should work without the loop.
... if I understand the physical address is latched during
sbc8548:
sbc8548.c: In function 'checkboard':
sbc8548.c:61: warning: type defaults to 'int' in declaration of 'type
name'
sbc8548.c: In function 'ft_pci_setup':
sbc8548.c:536: warning: unused variable 'path'
cfi_flash.c:161: warning: excess elements
On Wed, Feb 20, 2008 at 1:13 PM, [EMAIL PROTECTED] wrote:
1.3.2-rc1-gb6f29c84-dirty crashes on the very first attempt to write in
Flash. After that it gets back to the prompt and _ALL_ subsequent writes
work just fine. Only the very first one fails.
How did you program u-boot into the
On Feb 17, 2008 3:56 PM, Jean-Christophe PLAGNIOL-VILLARD
[EMAIL PROTECTED] wrote:
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD [EMAIL PROTECTED]
Applied, thanks!
Andy
-
This SF.net email is sponsored by: Microsoft
Defy
On Feb 17, 2008 3:56 PM, Jean-Christophe PLAGNIOL-VILLARD
[EMAIL PROTECTED] wrote:
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD [EMAIL PROTECTED]
Applied, thanks!
Andy
-
This SF.net email is sponsored by: Microsoft
Defy
are found in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git
Kumar Gala (1):
QE: Move FDT support into a common file
Timur Tabi (1):
85xx,86xx: Determine I2C clock frequencies and store in global_data
common/fdt_support.c | 48 --
are found in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git
Timur Tabi (1):
85xx,86xx: Determine I2C clock frequencies and store in global_data
cpu/mpc85xx/speed.c |3 +++
cpu/mpc86xx/speed.c |2 ++
include/asm-ppc/global_data.h |6
On Jan 30, 2008 3:28 PM, Kumar Gala [EMAIL PROTECTED] wrote:
When we go to 36-bit physical addresses we need to keep the concept of
the physical CCSRBAR address seperate from the virtual one.
For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR
Signed-off-by: Kumar Gala [EMAIL
On Feb 1, 2008 10:19 AM, Kumar Gala [EMAIL PROTECTED] wrote:
Added the cpu command that provides a generic mechanism to get status,
reset, and release secondary cores in multicore processors.
Added support for using the ePAPR defined spin-table mechanism on 85xx.
Signed-off-by: Kumar Gala
[EMAIL PROTECTED]
Acked-by: Andy Fleming [EMAIL PROTECTED]
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On Jan 16, 2008 3:00 AM, David Saada [EMAIL PROTECTED] wrote:
So, would you like me to repost this patch, with the added argument in
all the relevant board tables?
Yes, that would be great.
Another thing regarding this: I also have debug commands for
reading/writing parallel I/O pins (pio
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Acked-by: Andy Fleming [EMAIL PROTECTED]
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