Hi Simon,
On Wed, Apr 24, 2013 at 6:03 AM, Simon Glass s...@chromium.org wrote:
Hi,
On Tue, Apr 23, 2013 at 3:11 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Simon,
On Wed, Apr 24, 2013 at 3:25 AM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Simon,
On Wed, Apr 24, 2013 at 3:10 AM
Hi Simon,
On Fri, Apr 26, 2013 at 12:22 AM, Simon Glass s...@chromium.org wrote:
Hi Jagan,
On Thu, Apr 25, 2013 at 6:55 AM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Simon,
On Wed, Apr 24, 2013 at 6:03 AM, Simon Glass s...@chromium.org wrote:
Hi,
On Tue, Apr 23, 2013 at 3:11 PM
Hi Simon,
On Fri, Apr 26, 2013 at 7:13 AM, Simon Glass s...@chromium.org wrote:
Hi,
On Thu, Apr 25, 2013 at 12:06 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Simon,
On Fri, Apr 26, 2013 at 12:22 AM, Simon Glass s...@chromium.org wrote:
Hi Jagan,
On Thu, Apr 25, 2013 at 6:55 AM
Hi Simon,
On Fri, Apr 26, 2013 at 5:51 PM, Simon Glass s...@chromium.org wrote:
Hi Jagan,
On Thu, Apr 25, 2013 at 11:16 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Simon,
On Fri, Apr 26, 2013 at 7:13 AM, Simon Glass s...@chromium.org wrote:
Hi,
On Thu, Apr 25, 2013 at 12:06 PM
Hi All,
I need some help regarding mmc write and mmc read commands usage.
I am using a 4GB SD/MMC plus and socked eMMC cards, usually I am
formatting these cards on my host pc with
fat partition and copy the images into card. while in the u-boot level
I am reading the images from card and copy
Hi Josh,
On Sat, Apr 27, 2013 at 11:55 AM, Josh Wu josh...@atmel.com wrote:
Hi, Jagan
On 4/27/2013 4:51 AM, Jagan Teki wrote:
Hi All,
I need some help regarding mmc write and mmc read commands usage.
I am using a 4GB SD/MMC plus and socked eMMC cards, usually I am
formatting
Hi Rommel,
Thanks for your information.
On Tue, May 21, 2013 at 4:20 AM, Rommel Custodio
sessyargc+ub...@gmail.com wrote:
Jagannadha Sutradharudu Teki jagannadha.sutradharudu-teki at xilinx.com
writes:
Hi,
On.. drivers/mmc/sdhci.c
+ if (caps SDHCI_CAN_DO_8BIT)
+
Hi,
I think this reviewed already, but have a very few comments.
On Wed, Jan 23, 2013 at 12:00 PM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
This patch adds driver for the gigabyte devices
GD25LQ and GD25Q64B required for Snow Board.
Signed-off-by: Rajeshwari Shinde
Hi,
On Tue, May 21, 2013 at 6:24 PM, Rajeshwari Birje
rajeshwari.bi...@gmail.com wrote:
Hi All,
I use the DWMMC driver in u-boot mainline on exynos board and face the
following issue.
I do a mmc rescan 3 times, then fourth time I get a DATA ERROR, which
is due to FIFO underun/overun, after
Hi,
I have a simple question like these parts are legacy flashes i guess.
Could you please tell me on which boards these were used?
Thanks,
Jagan.
On Fri, Apr 26, 2013 at 1:32 PM, Kuo-Jung Su dant...@gmail.com wrote:
From: Kuo-Jung Su dant...@faraday-tech.com
Signed-off-by: Kuo-Jung Su
Hi Rajeshwari,
On Fri, Mar 22, 2013 at 11:51 AM, Rajeshwari Birje
rajeshwari.bi...@gmail.com wrote:
Hi Minkyu Kang,
Please let me know if we can merge this into u-boot-samsung branch or
do I need to re-base on some other branch.
Regards,
Rajeshwari Shinde
On Fri, Feb 8, 2013 at 9:56 AM,
Hi Allen,
On Sun, Mar 17, 2013 at 10:28 AM, Allen Martin amar...@nvidia.com wrote:
Add support for Winbond W25Q32DW 32Mbit part
Signed-off-by: Allen Martin amar...@nvidia.com
---
drivers/mtd/spi/winbond.c |5 +
1 file changed, 5 insertions(+)
diff --git
Hi,
On Wed, May 22, 2013 at 6:31 AM, Kuo-Jung Su dant...@gmail.com wrote:
2013/5/22 Jagan Teki jagannadh.t...@gmail.com:
Hi,
I have a simple question like these parts are legacy flashes i guess.
Could you please tell me on which boards these were used?
It's used on Faraday A369 evaluation
Hi Rajeshwari,
+ {
+ .id = 0x5014,
is this id code is correct? it seems like 0x4014
+ .nr_blocks = 128,
nr_blocks must be 16 i think?
+ .name = W25Q80,
+ },
};
Honestly the commit
Hi,
On Thu, May 23, 2013 at 1:31 PM, Balaji N balajin...@gmail.com wrote:
Hi All,
Before 6 months, I have taken U-Boot code from git repository and the
version details:
I think this is the link you cloned 6 months back,
On Thu, May 23, 2013 at 3:24 PM, Kuo-Jung Su dant...@gmail.com wrote:
2013/5/23 Jagan Teki jagannadh.t...@gmail.com:
Hi,
On Wed, May 22, 2013 at 6:31 AM, Kuo-Jung Su dant...@gmail.com wrote:
2013/5/22 Jagan Teki jagannadh.t...@gmail.com:
Hi,
I have a simple question like these parts
On Thu, May 23, 2013 at 6:45 PM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
Current DWMMC driver used to give FIFO underrun/overrun error every 3rd time
for mmc rescan command.
In current code FIFO_DEPTH is getting calculated after reading the FIFOTH
register and extracting the RX_WMARK
On Fri, May 24, 2013 at 7:12 AM, Jaehoon Chung jh80.ch...@samsung.com wrote:
On 05/24/2013 03:27 AM, Jagan Teki wrote:
On Thu, May 23, 2013 at 6:45 PM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
Current DWMMC driver used to give FIFO underrun/overrun error every 3rd time
for mmc rescan
On Fri, May 24, 2013 at 12:16 PM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi Jagan,
On 05/24/2013 03:15 PM, Rajeshwari Birje wrote:
Hi Jagan,
Please find my comments below.
On Fri, May 24, 2013 at 10:31 AM, Jagan Teki jagannadh.t...@gmail.com
wrote:
On Fri, May 24, 2013 at 7:12 AM
On Fri, May 24, 2013 at 7:24 PM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
This patch set enables PREAMBLE Mode for EXYNOS SPI.
Changes in v2:
- Remove preamable_count variable which is not really needed
- Fix checkpatch warning (multiple assignments)
Changes in V3:
Hi,
Any update on this, is this a different part w.r.t what I refer for?
Thanks,
Jagan.
On Thu, May 23, 2013 at 2:22 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Rajeshwari,
+ {
+ .id = 0x5014,
is this id code is correct? it seems like 0x4014
Hi,
Any update on this.
Thanks,
Jagan.
On Thu, May 23, 2013 at 1:15 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Allen,
On Sun, Mar 17, 2013 at 10:28 AM, Allen Martin amar...@nvidia.com wrote:
Add support for Winbond W25Q32DW 32Mbit part
Signed-off-by: Allen Martin amar...@nvidia.com
On Fri, May 24, 2013 at 6:39 AM, Kuo-Jung Su dant...@gmail.com wrote:
From: Kuo-Jung Su dant...@faraday-tech.com
Add support for Winbond's W25PXX SPI flash.
These devices is used on Faraday A369 evaluation board.
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Jagan Teki jagannadh.t
On Mon, Feb 4, 2013 at 11:30 PM, Marek Vasut ma...@denx.de wrote:
Hi,
was this ever applied? I see SPI flash patches are completely ignored.
This is a S25FL064A successor. It supports up to 104MHz bus
speed.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Heiko Schocher h...@denx.de
Cc:
On Tue, Feb 5, 2013 at 8:22 AM, Xie Xiaobo x@freescale.com wrote:
SPANSION recommend S25FL128S supersedes S25FL129P, and the two flash
memory have the same device ID and Memory architecture. So they can
use the same config parameters.
Signed-off-by: Xie Xiaobo x@freescale.com
---
On Sat, Feb 23, 2013 at 5:09 PM, Jagannadha Sutradharudu Teki
jagannadha.sutradharudu-t...@xilinx.com wrote:
Add support for Winbond W25Q256 SPI flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/mtd/spi/winbond.c |5 +
1 files changed, 5
On Sat, Feb 23, 2013 at 5:08 PM, Jagannadha Sutradharudu Teki
jagannadha.sutradharudu-t...@xilinx.com wrote:
The current implementation in spi_flash supports 3-byte address mode
due to this up to 16MB amount of flash is able to access for those
flashes which has an actual size of 16MB.
List
Hi,
Thanks for your response.
On Mon, May 27, 2013 at 11:09 AM, Rajeshwari Birje
rajeshwari.bi...@gmail.com wrote:
Hi Jagan,
Hope following reply answer your query.
On Sat, May 25, 2013 at 2:08 AM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi,
Any update on this, is this a different
Hi Rajeshwari,
On Mon, May 27, 2013 at 11:59 AM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi,
Thanks for your response.
On Mon, May 27, 2013 at 11:09 AM, Rajeshwari Birje
rajeshwari.bi...@gmail.com wrote:
Hi Jagan,
Hope following reply answer your query.
On Sat, May 25, 2013 at 2:08
:30 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Rajeshwari,
On Mon, May 27, 2013 at 11:59 AM, Jagan Teki jagannadh.t...@gmail.com
wrote:
Hi,
Thanks for your response.
On Mon, May 27, 2013 at 11:09 AM, Rajeshwari Birje
rajeshwari.bi...@gmail.com wrote:
Hi Jagan,
Hope following reply
Any update on this.
Was this patch refereed for denx tree?
Thanks,
Jagan.
On Tue, May 21, 2013 at 6:40 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi,
I think this reviewed already, but have a very few comments.
On Wed, Jan 23, 2013 at 12:00 PM, Rajeshwari Shinde
rajeshwar
On 28-08-2012 20:43, Marek Vasut wrote:
This is a S25FL064A successor. It supports up to 104MHz bus
speed.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Heiko Schocher h...@denx.de
Cc: Mike Frysinger vap...@gentoo.org
Cc: Scott Wood scottw...@freescale.com
Cc: Wolfgang Denk w...@denx.de
---
On 23-05-2013 20:39, Kuo-Jung Su wrote:
From: Kuo-Jung Su dant...@faraday-tech.com
Add support for Winbond's W25PXX SPI flash.
These devices is used on Faraday A369 evaluation board.
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Jagan Teki jagannadh.t...@gmail.com
CC: Tom Rini tr
On 23-02-2013 07:09, Jagannadha Sutradharudu Teki wrote:
Add support for Winbond W25Q256 SPI flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/mtd/spi/winbond.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git
Hi Simon,
Can you please check this change.
Thanks,
Jagan.
On Tue, May 28, 2013 at 1:44 AM, Jagannadha Sutradharudu Teki
jagannadha.sutradharudu-t...@xilinx.com wrote:
Missing return after memcpy is done for memory-mapped SPI flashes,
hence added retun 0 after memcpy done.
The return is
HI,
Few little comments.
CCed driver contributed delegate, may be they will help if I am
missing any thing.
On Tue, May 28, 2013 at 6:48 PM, laurent vaudoit
laurent.vaud...@gmail.com wrote:
Hello all,
i have integrated soft_spi driver in u-boot, in order to communicate with a
FRAM device,
On Wed, May 29, 2013 at 5:58 AM, Allen Martin amar...@nvidia.com wrote:
On Fri, May 24, 2013 at 01:39:51PM -0700, Jagan Teki wrote:
Hi,
Any update on this.
Thanks,
Jagan.
On Thu, May 23, 2013 at 1:15 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Allen,
On Sun, Mar 17, 2013 at 10
Any help on this, was this a useful fix.
Thanks,
Jagan.
On Mon, May 27, 2013 at 10:49 AM, Jagannadha Sutradharudu Teki
jagannadha.sutradharudu-t...@xilinx.com wrote:
Request for an update on this.
Thanks,
Jagan.
-Original Message-
From: Jagannadha Sutradharudu Teki
On Fri, May 31, 2013 at 1:13 PM, Xie Xiaobo x@freescale.com wrote:
SPANSION recommend S25FL128S supersedes S25FL129P, and the two flash
memory have the same device ID and Memory architecture. So they can
use the same config parameters.
Signed-off-by: Xie Xiaobo x@freescale.com
---
On Wed, May 29, 2013 at 11:40 AM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
A SPI slave may take time to react to a request. For SPI flash devices
this time is defined as one bit time, or a whole byte for 'fast read'
mode.
If the SPI slave is another CPU, then the time it takes to
Hi,
I know this has been reviewed multiples time, but I have few questions on it.
I think this preamble is one of spi mode characteristic, if so does it
specific to a hw?
On Wed, May 29, 2013 at 11:40 AM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
Support interfaces with a preamble
On Sun, Jun 2, 2013 at 11:25 PM, Simon Glass s...@chromium.org wrote:
Hi,
On Sun, Jun 2, 2013 at 10:24 AM, Jagan Teki jagannadh.t...@gmail.com
wrote:
On Wed, May 29, 2013 at 11:40 AM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
A SPI slave may take time to react to a request
On Thu, May 30, 2013 at 11:22 AM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
Since SPI register access is so expensive, it is worth transferring data
a word at a time if we can. This complicates the driver unfortunately.
Use the byte-swapping feature to avoid having to convert to/from
On 29-05-2013 01:40, Rajeshwari Shinde wrote:
A SPI slave may take time to react to a request. For SPI flash devices
this time is defined as one bit time, or a whole byte for 'fast read'
mode.
If the SPI slave is another CPU, then the time it takes to react may
vary. It is convenient to allow
On 29-05-2013 01:40, Rajeshwari Shinde wrote:
Support interfaces with a preamble before each received message.
We handle this when the client has requested a SPI_XFER_END, meaning
that we must close of the transaction. In this case we read until we
see the preamble (or a timeout occurs),
On 29-05-2013 01:40, Rajeshwari Shinde wrote:
Support interfaces with a preamble before each received message.
We handle this when the client has requested a SPI_XFER_END, meaning
that we must close of the transaction. In this case we read until we
see the preamble (or a timeout occurs),
On 29-05-2013 01:40, Rajeshwari Shinde wrote:
A SPI slave may take time to react to a request. For SPI flash devices
this time is defined as one bit time, or a whole byte for 'fast read'
mode.
If the SPI slave is another CPU, then the time it takes to react may
vary. It is convenient to allow
On 27-05-2013 15:41, Jagannadha Sutradharudu Teki wrote:
This patch adds a print messages while using 'sf read' and
'sf write' commands to make sure that how many bytes read/written
from/into flash device.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
common/cmd_sf.c
On 27-05-2013 15:44, Jagannadha Sutradharudu Teki wrote:
Missing return after memcpy is done for memory-mapped SPI flashes,
hence added retun 0 after memcpy done.
The return is missing in below patch
sf: Enable FDT-based configuration and memory mapping
(sha1:
On 27-05-2013 15:41, Jagannadha Sutradharudu Teki wrote:
This patch adds a print messages while using 'sf erase' command
to make sure that how many bytes erased in flash device.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
common/cmd_sf.c |8 +++-
Hi,
I think this needs to send as v3, as Simon sent v2 for this.
http://patchwork.ozlabs.org/patch/243139/
--
Thanks,
Jagan.
On Thu, May 30, 2013 at 12:01 PM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
This patch implements a custom spi_copy funtion to copy u-boot from SF
to RAM. This
Hi,
Does this tested on hw, please re-base the tree and send the next version patch.
Let me know if it ok to review under current tree.
--
Thanks,
Jagan.
On Thu, Dec 13, 2012 at 7:31 PM, Armando Visconti
armando.visco...@st.com wrote:
On 12/13/2012 12:41 PM, Vipin KUMAR wrote:
From: Armando
Hi,
Does this tested on hw, please re-base the tree and send the next version patch.
Let me know if it ok to review under current tree.
--
Thanks,
Jagan.
On Mon, Feb 11, 2013 at 9:09 AM, Prafulla Wadaskar prafu...@marvell.com wrote:
-Original Message-
From: Sebastian Hesselbarth
On Thu, May 30, 2013 at 7:19 PM, Jagannadha Sutradharudu Teki
jagannadha.sutradharudu-t...@xilinx.com wrote:
This commit is based on the patch from Xie Xiaobo x@freescale.com
with commit head title as sf: spansion: Add support for S25FL128S.
pulled the same code changes into current u-boot
Hi,
On Thu, May 30, 2013 at 7:19 PM, Jagannadha Sutradharudu Teki
jagannadha.sutradharudu-t...@xilinx.com wrote:
Use the exact names for W25Q 0x40XX ID's flash parts, as the same
sizes of flashes comes with different ID's. so-that the distinguishes
becomes easy with this change.
Hi,
Is this the v4? I sent some comment for v3 on same driver.
Thanks,
Jagan.
On Mon, Jun 3, 2013 at 1:54 PM, Armando Visconti
armando.visco...@st.com wrote:
This patch adds the support for the ARM PL022 SPI controller for the standard
variant (0x00041022), which has a 16bit wide and 8
I completely lost the original thread... I will re-start from V3...
Pls discard this noisy thread,
Please check the below thread for earlier v3
http://patchwork.ozlabs.org/patch/205814/
--
Thanks,
Jagan.
___
U-Boot mailing list
U-Boot@lists.denx.de
On Mon, Jun 3, 2013 at 11:01 PM, Sascha Silbe t-ub...@infra-silbe.de wrote:
Dear Jagan,
Jagan Teki jagannadh.t...@gmail.com writes:
Does this tested on hw, please re-base the tree and send the next version
patch.
Let me know if it ok to review under current tree.
I'd appreciate a review
Hi,
Looks ok to me as per coding style after a quick look.
On Mon, May 27, 2013 at 12:06 AM, Sascha Silbe t-ub...@infra-silbe.de wrote:
From: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
This adds an SPI driver for Marvell Dove SoCs. This driver is taken
from kirkwood_spi but
Hi,
Thanks for your new changes.
I don't know may be you sent these changes intentionally.
I personally not encouraging these as you sent all changes in one
patch, attached a patch series to mail and
did n't follow commit message header.
On Tue, Jun 4, 2013 at 10:34 AM, Insop Song insop.s...@cohere.net wrote:
Hi,
Thank you for your feedback.
-Original Message-
From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
Sent: Monday, June 03, 2013 12:14 PM
To: Insop Song
Cc: u-boot@lists.denx.de; york...@freescale.com
Hi Syed,
On Mon, Jun 3, 2013 at 12:53 AM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi,
On Thu, May 30, 2013 at 7:19 PM, Jagannadha Sutradharudu Teki
jagannadha.sutradharudu-t...@xilinx.com wrote:
Use the exact names for W25Q 0x40XX ID's flash parts, as the same
sizes of flashes comes
On Tue, Jun 4, 2013 at 10:49 PM, mch...@winbond.com mch...@winbond.com wrote:
Jagan,
So far, our major customer request is to have the same ID for backward
compatibility. Therefore the IDs are the same for W25Q16C and W25Q16D. As for
the 2.5V parts (W25Q80BL/W25Q16CL), they are the same die
On Wed, Jun 5, 2013 at 10:10 AM, Insop Song insop.s...@cohere.net wrote:
Hi Jagan,
Thank you for your feedback.
-Original Message-
From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
Sent: Monday, June 03, 2013 10:31 PM
To: Insop Song
Cc: u-boot@lists.denx.de; york...@freescale.com
Thank you very much for your interest on this.
What do you think?
Thank you,
Can u just send pseudo code about your logic, i couldn't get u exactly sorry.
Here is what I think, it is similar with your patch in the sense that do the
different status check for different device.
Request for comments.
--
Thanks,
Jagan.
On Fri, May 31, 2013 at 6:22 PM, Jagannadha Sutradharudu Teki
jagannadha.sutradharudu-t...@xilinx.com wrote:
This series is v2 for the patch series sent few weeks back with a head
sf: Accessing 16MBytes flashes in existing 3-byte addr mode.
The
On Thu, Jun 6, 2013 at 12:18 PM, Insop Song insop.s...@cohere.net wrote:
Hi Jagan,
Thank you for your feedback,
-Original Message-
From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
Sent: Wednesday, June 05, 2013 11:34 PM
To: Insop Song
Cc: u-boot@lists.denx.de; york
On Thu, Jun 6, 2013 at 11:02 AM, Michal Simek mon...@monstr.eu wrote:
move this discussion back to mailing list.
On 06/05/2013 05:56 PM, Jagan Teki wrote:
And are your ok with below representation for common id's parts ?
+ .name = W25Q80BL/W25Q80BV
Hi Simon,
On Sat, Jun 8, 2013 at 4:44 AM, Simon Glass s...@chromium.org wrote:
Hi Jagan,
On Fri, May 31, 2013 at 5:52 AM, Jagannadha Sutradharudu Teki
jagannadha.sutradharudu-t...@xilinx.com wrote:
Updated the spi_flash framework to handle all sizes of flashes
using bank/extd addr reg
Hi Simon,
Please let know your comments.
I have changed the logic, but removed spi_flash_cmd_poll_bit() use
poll code on spi_flash_cmd_wait_ready()
as no other call for spi_flash_cmd_poll_bit() this.
And also for read_status the check_status i assigned as 0,earlier it
has direct 0 (w/o
Hi Simon,
On Sat, Jun 8, 2013 at 8:02 PM, Simon Glass s...@chromium.org wrote:
Hi Jagan,
On Sat, Jun 8, 2013 at 1:32 AM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Simon,
Please let know your comments.
I have changed the logic, but removed spi_flash_cmd_poll_bit() use
poll code
Hi Simon,
On Sat, Jun 8, 2013 at 8:11 PM, Simon Glass s...@chromium.org wrote:
Hi,
On Sat, Jun 8, 2013 at 1:22 AM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Simon,
On Sat, Jun 8, 2013 at 4:44 AM, Simon Glass s...@chromium.org wrote:
Hi Jagan,
On Fri, May 31, 2013 at 5:52 AM
Hi Simon,
On Sun, Jun 9, 2013 at 7:43 PM, Simon Glass s...@chromium.org wrote:
Hi Jagan,
On Sat, Jun 8, 2013 at 7:44 AM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Simon,
On Sat, Jun 8, 2013 at 8:02 PM, Simon Glass s...@chromium.org wrote:
Hi Jagan,
On Sat, Jun 8, 2013 at 1:32 AM
Hi Simon,
On Sun, Jun 9, 2013 at 9:36 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Simon,
On Sun, Jun 9, 2013 at 7:43 PM, Simon Glass s...@chromium.org wrote:
Hi Jagan,
On Sat, Jun 8, 2013 at 7:44 AM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Simon,
On Sat, Jun 8, 2013 at 8:02
Hi,
Please use the commit header as below: just to sync with remaining
drivers in tree.
spi: arm-pl022: Add support for ARM PL022 spi controller
On Fri, Jun 7, 2013 at 1:14 PM, Armando Visconti
armando.visco...@st.com wrote:
This patch adds the support for the ARM PL022 SPI controller for the
Hi Tom,
On Sat, Jun 8, 2013 at 8:24 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Simon,
On Sat, Jun 8, 2013 at 8:11 PM, Simon Glass s...@chromium.org wrote:
Hi,
On Sat, Jun 8, 2013 at 1:22 AM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Simon,
On Sat, Jun 8, 2013 at 4:44 AM
Hi,
Request for few details here.
I am not understanding why this is applied on tree, [even i din't see
the applied note on mailing list, may be i am missing]
I was asked Xie Xiaobo to send v2 fo updating the name to
- .name = S25FL129P_64K/S25FL128S,
+ .name =
On Tue, Jun 11, 2013 at 2:01 AM, Simon Glass s...@chromium.org wrote:
Hi Jagan,
On Mon, Jun 10, 2013 at 8:27 AM, Jagan Teki jagannadh.t...@gmail.com
wrote:
Hi Simon,
On Sun, Jun 9, 2013 at 9:36 PM, Jagan Teki jagannadh.t...@gmail.com
wrote:
Hi Simon,
On Sun, Jun 9, 2013 at 7:43 PM
Hi,
I think we can wait some more time to mature the fdt support on
u-boot, as not many boards were using this future.
may be I am also incorrect.
And need to remove the CONFIG_ARCH_DEVICE_TREE references in
dts/Makefile to for working this.
--
Thanks,
Jagan.
On Tue, Jun 11, 2013 at 4:47 AM,
Hi Simon,
On Tue, Jun 11, 2013 at 3:19 AM, Simon Glass s...@chromium.org wrote:
On Mon, Jun 10, 2013 at 9:05 AM, Jagan Teki jagannadh.t...@gmail.com
wrote:
Hi Tom,
On Sat, Jun 8, 2013 at 8:24 PM, Jagan Teki jagannadh.t...@gmail.com
wrote:
Hi Simon,
On Sat, Jun 8, 2013 at 8:11 PM
Hi Simon,
On Tue, Jun 11, 2013 at 9:26 PM, Simon Glass s...@chromium.org wrote:
Hi Jagan,
On Tue, Jun 11, 2013 at 8:31 AM, Jagan Teki jagannadh.t...@gmail.com
wrote:
Hi Simon,
On Tue, Jun 11, 2013 at 3:19 AM, Simon Glass s...@chromium.org wrote:
On Mon, Jun 10, 2013 at 9:05 AM, Jagan
Hi Tom,
On Tue, Jun 11, 2013 at 9:46 PM, Tom Rini tr...@ti.com wrote:
On Mon, Jun 10, 2013 at 02:49:35PM -0700, Simon Glass wrote:
On Mon, Jun 10, 2013 at 9:05 AM, Jagan Teki jagannadh.t...@gmail.comwrote:
Hi Tom,
On Sat, Jun 8, 2013 at 8:24 PM, Jagan Teki jagannadh.t...@gmail.com
Hi,
Your patch looks good to me, but the same time
I have sent some comments on v4 patch
http://patchwork.ozlabs.org/patch/249603/
I think you might respond to above thread before sending v5, may be
your missing my
earlier comments?
fyi: One one more thing the patch subject prefix should be
On Wed, Jun 12, 2013 at 3:56 PM, Armando Visconti
armando.visco...@st.com wrote:
On 06/12/2013 10:56 AM, Jagan Teki wrote:
Hi,
Your patch looks good to me, but the same time
I have sent some comments on v4 patch
http://patchwork.ozlabs.org/patch/249603/
I think you might respond to above
On Wed, Jun 12, 2013 at 4:40 PM, Armando Visconti
armando.visco...@st.com wrote:
On 06/10/2013 06:01 PM, Jagan Teki wrote:
Hi,
Please use the commit header as below: just to sync with remaining
drivers in tree.
spi: arm-pl022: Add support for ARM PL022 spi controller
OK,
I already did
On Wed, Jun 12, 2013 at 5:48 PM, Armando Visconti
armando.visco...@st.com wrote:
Hello Jagan,
+
+/*
+ * ARM PL022 exists in different 'flavors'.
+ * This drivers currently support the standard variant (0x00041022),
that has a
+ * 16bit wide and 8 locations deep TX/RX FIFO.
+ */
+static
Thanks for v6 sent.
Have you tested this?
on which board, include/configs/*.h file?
--
Thanks,
Jagan.
On Wed, Jun 12, 2013 at 6:17 PM, Armando Visconti
armando.visco...@st.com wrote:
This patch adds the support for the ARM PL022 SPI controller for the standard
variant (0x00041022), which has
On Wed, Jun 12, 2013 at 8:49 PM, Armando Visconti
armando.visco...@st.com wrote:
But if you prefer to be on safer side I think we
need to re-do some checks on a spare 1340 board...
OK, maybe it is better to re-check again.
I need to find some time and a spare board...
I'll let you know,
On Wed, Jun 12, 2013 at 9:12 PM, Stefano Babic sba...@denx.de wrote:
Hi Dirk,
On 12/06/2013 07:28, Dirk Behme wrote:
On 11.05.2013 07:25, Dirk Behme wrote:
The spi clock divisor is of the form x * (2**y), or x y, where x is
1 to 16, and y is 0 to 15. Note the similarity with floating
On Wed, Jun 12, 2013 at 9:30 PM, Stefano Babic sba...@denx.de wrote:
Hi,
On 12/06/2013 17:47, Jagan Teki wrote:
Sorry, i didn't understand the conversation here, was this fix applied?
Could you please explain.
Patches are not applied and are currently assigned to me. As they
concerned
Hi Simon,
On Wed, Jun 12, 2013 at 3:59 AM, Simon Glass s...@chromium.org wrote:
Hi Jagan,
On Tue, Jun 11, 2013 at 12:23 PM, Jagannadha Sutradharudu Teki
jagannadha.sutradharudu-t...@xilinx.com wrote:
This series is v3 for the patch series sent few weeks back with a head
sf: Update sf
Hi,
Few comments, please get back your inputs.
Use commit header as spi: ftssp010_spi:
On 07-05-2013 12:04, Kuo-Jung Su wrote:
From: Kuo-Jung Su dant...@faraday-tech.com
The Faraday FTSSP010 is a multi-function controller
which supports I2S/SPI/SSP/AC97/SPDIF. However This
patch implements
Hi,
On 03-06-2013 23:50, Jagan Teki wrote:
Hi,
Looks ok to me as per coding style after a quick look.
On Mon, May 27, 2013 at 12:06 AM, Sascha Silbe t-ub...@infra-silbe.de wrote:
From: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
This adds an SPI driver for Marvell Dove SoCs
Hi,
Can you please update the commit header and logic of the code
w.r.t current master tree.
also please use proper commit body.
--
Thanks,
Jagan.
On 27-09-2012 02:37, Dale Smith wrote:
The fsl spi engine is non functional when reading from a device. This
patch fixes it.
Note that none of
On 12-06-2013 15:49, Ajay Bhargav wrote:
- Marek Vasut ma...@denx.de wrote:
Dear Simon Glass,
On Tue, Jun 11, 2013 at 6:57 AM, Axel Lin axel@ingics.com
wrote:
Signed-off-by: Axel Lin axel@ingics.com
Reviewed-by: Simon Glass s...@chromium.org
Reviewed-by: Marek Vasut
On Thu, Jun 13, 2013 at 12:56 AM, Sebastian Hesselbarth
sebastian.hesselba...@gmail.com wrote:
On 06/12/2013 08:58 PM, Jagan Teki wrote:
On 03-06-2013 23:50, Jagan Teki wrote:
Looks ok to me as per coding style after a quick look.
On Mon, May 27, 2013 at 12:06 AM, Sascha Silbe
t-ub...@infra
Hi,
Can you separate the PMIC and SPI changes into two different patches.
Also may i know why you remove the SPI from configs, does it defined
some where or you don't want SPI at all.?
--
Thanks,
Jagan.
On 07-06-2013 17:25, Inderpal Singh wrote:
They have been defined once already. Hence
Hi,
On 30-05-2013 10:49, Rajeshwari Shinde wrote:
For devices that need some time to react after a spi transaction
finishes, add the ability to set a delay.
Implement this as a delay on the first/next transaction to avoid
any delay in the fairly common case where a SPI transaction is
followed
On 30-05-2013 10:57, Rajeshwari Shinde wrote:
Accessing SPI registers is slow, but access to the FIFO level register
in particular seems to be extraordinarily expensive (I measure up to
600ns). Perhaps it is required to synchronise with the SPI byte output
logic which might run at 1/8th of the
Hi,
Thanks for sending this.
Few comments.
1. Please use subject prefix with version number this case it should
be PATH v3
2. Commit header should be stand' one as all follows.
spi: fsl_espi:
On Thu, Jun 13, 2013 at 3:24 AM, Dale P. Smith
dsm...@vtiinstruments.com wrote:
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