Hey Jason,
Have you tried using a smaller SPP such as 256?
Jonathon
On Thu, Jul 26, 2018 at 2:39 AM, Jason Matusiak via USRP-users
wrote:
> So, somehow I got things working for the first run in a certain situation.
> I attached 2 pictures to show my flowgraphs. Again, my LBT block is
>
Hi,
1) You cannot reduce noc_shell resource usage much. You can try
putting all your custom logic in just one RFNoC block, that way you do
not incur the overhead of multiple noc_shell instances.
2) Do you mean "Can I access PS DDR memory directly from the FPGA
fabric?" If so, yes you can via the
Hey Jason,
The block is functionally complete, in fact I think it was the first
block ever made. There is a UHD C++ example,
rfnoc_nullsource_ce_rx.cpp, that uses it. A block controller and GRC
xml for GNU Radio needs to be created though.
Jonathon
On Wed, Jul 18, 2018 at 4:38 AM, Jason
Hey Jason,
You can send a command packet to another block via noc_shell's cmd_out
port. Command packets basically encapsulate a settings bus write. In
the payload of the command packet, the upper 32 bits are the settings
register address and the lower 32 bits are the data. Also, the block
will
Thank you so much!! Julian! Starting the RX streamer a little bit in the
future works!! Now I can align 4 channels as coherent receiver with 50M sps
without problem.
Also thanks for Marcus's help
All Best,
Jack
On Sun, Jul 29, 2018 at 12:49 PM, Julian Arnold
wrote:
> Hey,
>
> have you tried
On Mon, Jul 30, 2018 at 3:14 PM Jason Matusiak via USRP-users <
usrp-users@lists.ettus.com> wrote:
> I am curious if it is possible to enable an RFNoC block from another RFNoC
> block? An example would be, turning on the siggen when another RFNoC block
> decides that it should run.
>
Not sure I
I am curious if it is possible to enable an RFNoC block from another RFNoC
block? An example would be, turning on the siggen when another RFNoC block
decides that it should run.
I don't believe that I've seen this done anywhere, so I have a suspicion that
there isn't a good way to get
On 07/30/2018 12:30 PM, Amirhosein naseri via USRP-users wrote:
Hi everybody
I want to use Two DDC chain in usrp N210 to get streams for example
around freq0 and freq1 with sample rate 400e3 for each channel.
first i use uhd.tune_request_t function as argument fot
set_center_freq function as
Hi everybody
I want to use Two DDC chain in usrp N210 to get streams for example around
freq0 and freq1 with sample rate 400e3 for each channel.first i use
uhd.tune_request_t function as argument fot set_center_freq function as below :
usrp1.set_center_freq ( uhd.tune_request_t (freq1,0) ,
I've actually done this with success, unfortunately, I am not allowed to share
it :(. It wasn't too hard, I used a core in the block to hold the data, and
then I just repeated it when I sent it out over and over.
The catch was that there was a little bit of an issue within rfnoc at the time
Hello Fabian and Young,
The suggestion about timed commands is on point, I think that is what is
missing. Using unknown PPS will not hurt as there are two radio blocks with
timekeepers and using the unknown PPS setting, or external or gpsdo if
installed, will ensure that they are aligned.
> 3)
Hi，
thanks for you attention, i used two multi usrp object for each one. and usb 3
used.
--原始邮件--
发件人："Marcus D. Leech via USRP-users ";
发送时间：2018年7月30日(星期一) 晚上11:36
收件人："usrp-users" ;
主题：Re: [USRP-users] overflowed when running two B210 simultaneously inone pc
On 07/30/2018 09:32 AM, lichunming via USRP-users wrote:
Dear All,
I've got the following problem:
I used two B210 boardssimultaneously in one program on one desktop pc with i7-7700K cpu,
the two B210 was set different centre frequency. I started board A firstly, and it worked
with no
Perhaps look at the RFNoC siggen block. You will need to add some component
such as a block memory or fifo to store the samples on the fpga and then
you will need a way to populate the memory and then play it out when
desired.
Rob
On Mon, Jul 30, 2018 at 3:49 AM Farnaz Chamanzadeh
wrote:
>
Dear All, I've got the following problem:
I used two B210 boardssimultaneously in one program on one desktop pc with
i7-7700K cpu, the two B210 was set different centre frequency. I started board
A firstly, and it worked with no problem. Then I started board B and there was
"overflowed"
Dear Rob,
Thanks for your helpful response. The reason that we need to use a switch
is due to hour host hardware limits, which only have one 10GBE.
About the second remark in your email, do you have an example or a
reference where a similar case was implemented which we can use as a
guideline for
Hi Young,
I am not an expert, but I have three suggestions:
1) Using 'Unknown PSS' or any other sync method should not have no
affect, as this is for syncing two or more USRPs. You have only one FPGA
and that is in sync with itself ;)
2) Did you tried using timed commands? (see function
Hi all,
I hope someone could help me on my situation. I could not find similar cases on
the usrp archive.
I have one USRP X310 that has UBX-160(slot A) , LFTX board(slot B) and GPS
module installed.
- my UHD is 3.11.0
- Using uhd API based on tx_samples from_file.cpp, I can generate dual
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