Module Name: src
Committed By: jmcneill
Date: Mon Oct 13 13:34:54 UTC 2014
Modified Files:
src/sys/arch/arm/allwinner: awin_dma_a31.c awin_reg.h
Log Message:
ignore pending bits that arent enabled
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/allwinner/awin_dma_a31.c
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/arm/allwinner/awin_reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/allwinner/awin_dma_a31.c
diff -u src/sys/arch/arm/allwinner/awin_dma_a31.c:1.1 src/sys/arch/arm/allwinner/awin_dma_a31.c:1.2
--- src/sys/arch/arm/allwinner/awin_dma_a31.c:1.1 Mon Oct 13 12:34:00 2014
+++ src/sys/arch/arm/allwinner/awin_dma_a31.c Mon Oct 13 13:34:54 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: awin_dma_a31.c,v 1.1 2014/10/13 12:34:00 jmcneill Exp $ */
+/* $NetBSD: awin_dma_a31.c,v 1.2 2014/10/13 13:34:54 jmcneill Exp $ */
/*-
* Copyright (c) 2014 Jared D. McNeill <[email protected]>
@@ -29,7 +29,7 @@
#include "opt_ddb.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: awin_dma_a31.c,v 1.1 2014/10/13 12:34:00 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: awin_dma_a31.c,v 1.2 2014/10/13 13:34:54 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -161,10 +161,11 @@ awin_dma_a31_intr(void *priv)
pend = pend0 | ((uint64_t)pend1 << 32);
- while ((bit = ffs64(pend)) != 0) {
+ while ((bit = ffs64(pend & AWIN_A31_DMA_IRQ_PKG_MASK)) != 0) {
mask = __BIT(bit - 1);
pend &= ~mask;
index = (bit - 1) / 4;
+
if (awin_dma_channels[index].ch_callback == NULL)
continue;
awin_dma_channels[index].ch_callback(
Index: src/sys/arch/arm/allwinner/awin_reg.h
diff -u src/sys/arch/arm/allwinner/awin_reg.h:1.34 src/sys/arch/arm/allwinner/awin_reg.h:1.35
--- src/sys/arch/arm/allwinner/awin_reg.h:1.34 Mon Oct 13 12:34:00 2014
+++ src/sys/arch/arm/allwinner/awin_reg.h Mon Oct 13 13:34:54 2014
@@ -1870,6 +1870,10 @@ struct awin_mmc_idma_descriptor {
#define AWIN_A31_DMA_IRQ_EN_REG1_PKG_IRQ_EN(n) __BIT((n - 8) * 4 + 1)
#define AWIN_A31_DMA_IRQ_EN_REG1_HLAF_IRQ_EN(n) __BIT((n - 8) * 4 + 0)
+#define AWIN_A31_DMA_IRQ_QUEUE_MASK 0x4444444444444444UL
+#define AWIN_A31_DMA_IRQ_PKG_MASK 0x2222222222222222UL
+#define AWIN_A31_DMA_IRQ_HF_MASK 0x1111111111111111UL
+
#define AWIN_A31_DMA_EN_EN __BIT(0)
#define AWIN_A31_DMA_PAU_PAUSE __BIT(0)
