On 2/16/11 1:13 PM, Joe Leikhim wrote:
For clarification;
I am investigating an experiment using GPS to create a FHSS or DSSS
project similar to those of AMRAD and described in the ARRL Spread
Spectrum Sourcebook. In those experiments, a specific shift register
sequence was used (see below), the clock was free running and a reset
tone was transmitted on irregular intervals (whenever synch was believed
to be lost) over the radio circuit.
You can guesstimate how long it will be til you're out of sync.
if your chip rate is 1 MHz, and your oscillators are the same within 1
ppm, then you'll drift one 1 chip in a second, so your 1pps from the GPS
won't be frequent enough.
OTOH, if you're using a disciplined 10MHz from a GPSDO which is good to
1E-10 or so, then in a second, you'll only be 1E-4 chip out of sync (for
a 1MHz chip rate).
For a DS system, being half a chip out of sync is a 3dB loss. A lot of
systems (particularly designed in the 70s) which used sync circuits that
could only track within 1/2 chip were happy to have that kind of
performance. Hence, GPS C/A code provided accuracy on the order of 500ns
(half a chip) which corresponds to 150ish meters, which is not
sufficient to destroy a hardened missile silo. Remember that back in
the 70s, tracking a code at 10 Mchip/s to a fraction of a chip (a no
brainer these days) was very challenging.
Depending on what you're sending over the DS link, 1/2 chip sync might
be good enough. For instance, if you're spreading an AM signal..
In my experiment I would like to derive the clock directly from a GPS at
each radio and use the GPS to periodically reset the shift register
without causing a glitch or disrupting the sequence. There is mention in
the sourcebook of a relationship between clock speed, reset interval and
shift register stage length. It is this area that I am confused.
Your challenge will not be in the reset.. it will be in determining the
code phase offset between your two stations (unless you're doing
something with low chip rates and close distances).
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