Him Daniel,
the chip all 74HC4046, HC7046 and the HC9046 are well designed and
working fine for the application for which they were designed for, but
of course if you trying to used for something else you may run into
problems. Roland best describes the funtion of the chip in details with
many
examples:http://books.google.com/books/about/Phase_Locked_Loops_6_e_Design_Simulation.html?id=WjNy3RX9xcAC
73
Alex
On 4/29/2014 7:38 PM, Daniel Mendes wrote:
Hi... can you share you routine for designing with this chip? I tried
using it sometime ago but the results didn´t agree much with what I
designed, so i gave up (for now... but i´ll return to it :)
Also in the datasheet it says:
13.3 Further information
For an extensive description and application example please refer to
Application note ordering number 9397 750 00078.
I never found this application note despites all my google-fu. Anyone
got it?
Daniel
Em 29/04/2014 10:23, sg sg escreveu:
Running my PLL design routine again for 48 kHz I realize that this is
in fact very advantageous--it greatly reduces the required capacitor
size in the loop filter. So dividers are clearly the way to go.
Samuel
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