Depends what you call "systematic"... I can only speak for Ublox but it is fairly representative of modern (even though its architecture did not change for almost 10 years) GPS chipsets. The quantisation runs off internal cheap XO or TCXO that is PLLed to produce MCU core clock that is then phase-accumulation quantised to the current navigation solution target - typically every 1-10Hz. Stock Ublox has 26MHz XO/TCXO which is then PLLed by MCU core into system 48MHz clock which runs the Cortex core - including timers - that produce 1PPS TP.
Somebody measured Ublox 1PPS against the stable timebase and looked at same Ublox reported quantisation correction (ps order of magnitude) and actual error was about 1ns order of magnitude. This would be unaccounted discrepancy of what Ublox thinks is happening on its 1PPS I/O pin and what is actually there. This makes analogue delay line correction only viable to that level of accuracy. Whether this inaccuracy is the result of a high core PLL phase noise, sloppy quantisation algorithm or hardware I/O drivers is an interesting academic question but won't solve the problem. Ublox core can run off many external clock frequencies from 12 to 40MHz but they all will go through the PLL which makes it pointless to experiment with. Leo > From: Magnus Danielson <[email protected]> > > Recall that the quantization is really a form of time-stamp value for > the channel in it's relation to the time-base. It's a systematic pattern > in the time-base clock and it is phase-locked to the time-base phase. > ... > So, to conclude, the quantization noise that we have is very systematic > in its nature, _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com and follow the instructions there.
