Replace all uses of CLK_XTAL with CLK_PAD_CLK26M. This avoids declaring the same parent clock two different ways and will eventually let us remove CLK_PARENT_XTAL completely.
Signed-off-by: David Lechner <[email protected]> --- drivers/clk/mediatek/clk-mt8195.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8195.c b/drivers/clk/mediatek/clk-mt8195.c index 28b2e2f12ac..37cceb5f32b 100644 --- a/drivers/clk/mediatek/clk-mt8195.c +++ b/drivers/clk/mediatek/clk-mt8195.c @@ -96,7 +96,6 @@ static const struct mtk_pll_data apmixed_plls[] = { }; static const struct mtk_clk_tree mt8195_apmixedsys_clk_tree = { - .xtal_rate = 26 * MHZ, .pll_parent = EXT_PARENT(CLK_PAD_CLK26M), .ext_clk_rates = ext_clock_rates, .num_ext_clks = ARRAY_SIZE(ext_clock_rates), @@ -105,7 +104,7 @@ static const struct mtk_clk_tree mt8195_apmixedsys_clk_tree = { }; #define FIXED_CLK0(_id, _rate) \ - FIXED_CLK(_id, CLK_XTAL, CLK_PARENT_XTAL, _rate) + FIXED_CLK(_id, CLK_PAD_CLK26M, CLK_PARENT_EXT, _rate) static const struct mtk_fixed_clk top_fixed_clks[] = { FIXED_CLK0(CLK_TOP_IN_DGI, 165000000), @@ -1409,7 +1408,6 @@ static const int mt8195_id_top_offs_map[] = { }; static const struct mtk_clk_tree mt8195_topckgen_clk_tree = { - .xtal_rate = 26 * MHZ, .ext_clk_rates = ext_clock_rates, .num_ext_clks = ARRAY_SIZE(ext_clock_rates), .id_offs_map = mt8195_id_top_offs_map, @@ -1597,7 +1595,6 @@ static const struct mtk_gate infra_ao_clks[] = { }; static const struct mtk_clk_tree mt8195_infracfg_ao_clk_tree = { - .xtal_rate = 26 * MHZ, .ext_clk_rates = ext_clock_rates, .num_ext_clks = ARRAY_SIZE(ext_clock_rates), }; -- 2.43.0
