From: Petr Hodina <[email protected]>

The RK3399 clock driver cannot handle DCLK_VOP0_DIV, ACLK_VOP0 and
HCLK_VOP0 parents through clk_set_defaults(). Therefore probing the VOP
fails with -ENOENT.

Delete the assigned-clock properties on both VOPs and disable vopb.
Only vopl drives the panel and the driver shares a single PLL between
the two VOPs anyway.

Based on megi's fd095c54eee ("rockchip: rk3399: DTS video output/menu
support on Pinephone Pro"), https://codeberg.org/megi/u-boot

Signed-off-by: Petr Hodina <[email protected]>
---
 arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi 
b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
index 2825d43a9d8..a3a8610d56f 100644
--- a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
@@ -41,3 +41,15 @@
        status = "okay";
 };
 
+&vopb {
+       /delete-property/ assigned-clocks;
+       /delete-property/ assigned-clock-rates;
+       /delete-property/ assigned-clock-parents;
+       status = "disabled";
+};
+
+&vopl {
+       /delete-property/ assigned-clocks;
+       /delete-property/ assigned-clock-rates;
+       /delete-property/ assigned-clock-parents;
+};

-- 
2.55.0


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