https://codereview.chromium.org/284153004/diff/20001/src/arm/assembler-arm-inl.h
File src/arm/assembler-arm-inl.h (right):
https://codereview.chromium.org/284153004/diff/20001/src/arm/assembler-arm-inl.h#newcode543
src/arm/assembler-arm-inl.h:543: MemoryBarrier();
Instruction prefetching is implementation defined so what you are trying
to achieve is not guaranteed to work, as being on the same cache line
does not guarantee being fetched atomically (though on most CPU it
probably does).
You could make it work if there was only one instruction, but with two I
don't see a way to avoid cache maintenance. Sorry.
As a separate note, MemoryBarrier will guarantee the write above it will
happen before the write after but it does not guarantee they will be
visible to the instruction side of the CPU.
https://codereview.chromium.org/284153004/
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