Hi Gilles,

i found the problem that disable interrupts when execute a task.
My kernel for imx25 uses the properties CONFIG_MXC_IRQ_PRIOR in the .config.
This properties enable reentrant interrupts so it uses the NIMASK(normal interrupt mask register ) register to disable interrupts with
certain priority level. The interrupt of timer is disabled in that cases.
i tried to disable this option in the kernel but i have other big problems with the task and so i have to do other tests before saying the conclusions.


Do you know if xenomai doesn't work with reentrant interrupts ?





Il 18/04/2012 13:51, Gilles Chanteperdrix ha scritto:
On 04/18/2012 12:28 PM, Roberto Bielli wrote:
Hi Gilles,

i try to give only another accurate information.

i made another test:
i write a xenomai driver for reading the timer and avic register and i
see a strange behaviour.
when there is the problem the interrupt is NOT masqueraded in avic but
the timer has the interrupt not acked.
Ah, that is good news, at least now we have a clue. Note that it could
also mean that the timer has ticked, but the irq is not generated for
another reason. I think you should dump all the timer registers, and see
if anything is wrong by decoding their values with the datasheet.

A quick test also, assuming that the write to the MX3_TSTAT regiter in
gpt_irq_acknowledge may be posted, try rereading the register after
writing it.

After this i understand that now are my problems.
Do you know somebody that can help me understanding the problem only for
xenomai side?
If you need someone's help, you need to give access to your board to
that person or company. Because indirect debugging is really
inefficient: look at how many mails I had to send you over how much time
to get you to do what anybody with xenomai experience would have done in
just a few hours.



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