On Wed, 2011-05-04 at 22:53 +0530, Poonam Aggrwal wrote:
+sinclude $(obj).depend
+
+#
diff --git a/nand_spl/board/freescale/p1010rdb/nand_boot.c
b/nand_spl/board/freescale/p1010rdb/nand_boot.c
new file mode 100644
On Wed, 2011-05-04 at 12:34 -0500, Kumar Gala wrote:
+
+#define udelay(x) {int i, j; for (i = 0; i x; i++) for (j = 0; j
1; j++); }
There were many comments on this udelay before, we should not use this
define, but use the udelay() which u-boot provides.
Is there a udelay
Dear Wolfgang,
On Thu, 2011-03-31 at 16:52 +0200, Wolfgang Denk wrote:
Commit 6dc1ece Introduce a new linker flag LDFLAGS_FINAL modified a
number of Makefiles in a way that broke out-of-tree builds. The
problem was that $(nandobj) was used before it got defined.
What is out-of-tree builds? Why
On Thu, 2011-03-31 at 17:37 +0200, Wolfgang Denk wrote:
$(nandobj) was defined in those Makefiles in that way before applying
LDFLAGS_FINAL patch. Why could the out-of-tree builds passed before
applying LDFLAG_FINAL patch?
Have a look at the changes introduced by your commit, and you
On Wed, 2011-02-16 at 19:58 +0100, Wolfgang Denk wrote:
Dear Haiying Wang,
In message 1297881643.1977.28.camel@haiying-laptop you wrote:
We have some 524 PowerPC configurations in boards.cfg, and the compare
must be done for _all_ off these, i. e. there are 2 x 524 pairs of
files
On Thu, 2011-02-17 at 14:28 -0500, Haiying Wang wrote:
Your scripts works fine. Now I only get one pair of diff which are
System.map.mpc7448hpc2.diff u-boot.map.mpc7448hpc2.diff, because
mpc7448hpc2 failed to build:
Configuring for mpc7448hpc2 board...
cc1: error: AltiVec and E500
On Wed, 2011-02-16 at 19:29 +0100, Wolfgang Denk wrote:
Dear Haiying Wang,
In message 1297878184.1977.18.camel@haiying-laptop you wrote:
I did run ./MAKEALL powerpc for all ppc board, the System.map and
u-boot.map keep exactly the same before and after applying the
LDFLAGS_FINAL patch
On Tue, 2011-02-08 at 10:52 -0600, Kumar Gala wrote:
+#endif
uec = (uec_private_t *)dev-priv;
if (uec-the_first_run == 0) {
+#ifdef CONFIG_P1021
+ /* reset micrel phy for each UEC */
+ clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 11), BCSR11_ENET_MICRST);
+
On Tue, 2011-02-08 at 12:09 -0500, Haiying Wang wrote:
On Tue, 2011-02-08 at 10:52 -0600, Kumar Gala wrote:
+#endif
uec = (uec_private_t *)dev-priv;
if (uec-the_first_run == 0) {
+#ifdef CONFIG_P1021
+ /* reset micrel phy for each UEC */
+ clrbits_8((u8
-off-by: Haiying Wang haiying.w...@freescale.com
---
v3: change resetting micrel phy via bcsr to board specific.
arch/powerpc/cpu/mpc85xx/speed.c |4 ++
arch/powerpc/include/asm/immap_85xx.h | 13
board/freescale/p1021mds/p1021mds.c | 51
Dear Wolfgang,
On Tue, 2011-02-01 at 14:40 -0600, Scott Wood wrote:
On Tue, 1 Feb 2011 21:20:50 +0100
Wolfgang Denk w...@denx.de wrote:
Dear Scott Wood,
In message 20110201135136.0817f...@udp111988uds.am.freescale.net you
wrote:
Prior to the introduction of LDFLAGS_u-boot,
Dear Wolfgang,
On Thu, 2011-01-27 at 09:44 -0500, haiying.w...@freescale.com wrote:
From: Haiying Wang haiying.w...@freescale.com
Signed-off-by: Haiying Wang haiying.w...@freescale.com
Acked-by: Scott Wood scottw...@freescale.com
---
Makefile | 30 ++
1
On Wed, 2011-02-02 at 11:27 -0600, Kumar Gala wrote:
+void cpu_late_init_r(void)
+{
+#ifdef CONFIG_QE
+ uint qe_base = CONFIG_SYS_IMMR + 0x0008; /* QE immr base */
+ qe_init(qe_base);
+ qe_reset();
+#endif
+}
You did not move qe_reset() inside qe_init() as you
On Tue, 2011-02-01 at 08:34 +0100, Wolfgang Denk wrote:
Can you please be more specific? I don't see where the
LDFLAGS_u-boot commit (you mean 8aba9dc ?) would change any related
code. The relevant hunk looks like this:
@@ -204,9 +204,11 @@ endif
AFLAGS := $(AFLAGS_DEBUG)
On Tue, 2011-02-01 at 10:50 -0600, Scott Wood wrote:
If it is a one time setting, there should be no problem to put it into
board code. But these pin settings need to be done before any usage of
phy read/write (accessing MDIO/MDC), and need to be released after the
usage of phy, thus
On Tue, 2011-02-01 at 13:15 -0600, Kumar Gala wrote:
On Feb 1, 2011, at 11:01 AM, Haiying Wang wrote:
On Tue, 2011-02-01 at 10:50 -0600, Scott Wood wrote:
If it is a one time setting, there should be no problem to put it into
board code. But these pin settings need to be done before
On Mon, 2011-01-31 at 21:11 +0100, Wolfgang Denk wrote:
+#ifdef CONFIG_P1021
+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+ /* QE9 and QE12 need to be set for enabling QE MII managment signals */
+ setbits_be32(gur-pmuxcr, MPC85xx_PMUXCR_QE9);
+
On Mon, 2011-01-31 at 21:08 +0100, Wolfgang Denk wrote:
Dear haiying.w...@freescale.com,
In message 1296499317-26616-6-git-send-email-haiying.w...@freescale.com you
wrote:
From: Haiying Wang haiying.w...@freescale.com
For some board which doesn't have NOR flash and the QE's firmware
On Mon, 2011-01-31 at 15:28 -0600, Kumar Gala wrote:
On Jan 31, 2011, at 2:50 PM, Haiying Wang wrote:
On Mon, 2011-01-31 at 21:11 +0100, Wolfgang Denk wrote:
+#ifdef CONFIG_P1021
+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+ /* QE9 and QE12 need to be set
On Fri, 2011-01-28 at 11:02 +0100, Fabian Cenedese wrote:
I'm not questioning the patch, I'm just trying to understand.
+#define CONFIG_MP /* Multiprocessor support */
+
+#define CONFIG_PCI /* Disable PCI/PCIE */
Shouldn't that be Enable PCI?
On Fri, 2011-01-28 at 08:49 -0600, Kumar Gala wrote:
+
+struct law_entry law_table[] = {
+#ifndef CONFIG_IN_TPL
+ SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_1),
+ SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_1),
+
On Fri, 2011-01-28 at 11:36 -0600, Scott Wood wrote:
On Thu, 27 Jan 2011 23:58:10 -0500
haiying.w...@freescale.com wrote:
From: Haiying Wang haiying.w...@freescale.com
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
arch/powerpc/config.mk |4
config.mk
On Fri, 2011-01-28 at 12:30 -0600, Scott Wood wrote:
diff --git a/config.mk b/config.mk
index 5147c35..d7bb07f 100644
--- a/config.mk
+++ b/config.mk
@@ -260,8 +260,13 @@ $(obj)%.s: %.c
#
On Fri, 2011-01-28 at 13:46 -0500, Haiying Wang wrote:
In any case, I don't think we want different behavior here based on
whether we have TPL. Either LDFLAGS is used in partial linking, or
it's not.
I don't understand why LDFLAGS was added here in patch
http://lists.denx.de/pipermail/u
On Fri, 2011-01-28 at 13:24 -0600, Timur Tabi wrote:
Haiying Wang wrote:
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
Not 0x57? That's where the NXID EEPROM almost always is.
It is board specific value, isn't it? P1021MDS does use 0x52 for board
eeprom.
I just wanted you
Dear Wolfgang,
On Mon, 2011-01-24 at 23:29 +0100, Wolfgang Denk wrote:
Dear Haiying Wang,
In message 1295907459.2051.158.camel@haiying-laptop you wrote:
It's not the name. But you use it ina few places here, buth then hard
encode tpl in a number of other paces there. Which means
On Mon, 2011-01-24 at 13:49 +0100, Wolfgang Denk wrote:
+ifeq ($(CONFIG_TPL_U_BOOT),y)
+TPL_BOOT = tpl
+endif
I don't understand what the TPL_BOOT is good for, or how it's
supposed to work.
TPL_BOOT works like NAND_SPL but after NAND_SPL is executed. It is a
middle
On Mon, 2011-01-24 at 23:09 +0100, Wolfgang Denk wrote:
Dear Haiying Wang,
In message 1295906076.2051.127.camel@haiying-laptop you wrote:
What I do not understand is what the TPL_BOOT variable in the
Makefile is good for. I cannot understand the current use.
Well, it was used
On Sat, 2011-01-22 at 23:12 +0100, Wolfgang Denk wrote:
You should not undo a previous copyright. I guess you mean:
Copyright 2009-2010 Freescale Semiconductor, Inc.
?
Yes. Sorry about it.
+DECLARE_GLOBAL_DATA_PTR;
Please move this up to top of file.
OK.
+unsigned long
On Sat, 2011-01-22 at 23:04 +0100, Wolfgang Denk wrote:
diff --git a/Makefile b/Makefile
index 87a383d..94af465 100644
--- a/Makefile
+++ b/Makefile
@@ -290,6 +290,10 @@ LDPPFLAGS += \
$(shell $(LD) --version | \
sed -ne 's/GNU ld version
On Wed, 2010-12-01 at 08:56 -0700, Kumar Gala wrote:
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 4b8faa5..eb34378 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -369,7 +369,7 @@ int
On Wed, 2010-12-01 at 11:50 -0700, Kumar Gala wrote:
Any reason to just not move QE init for everyone?
That was based on Wolfgang's comment:
http://lists.denx.de/pipermail/u-boot/2010-August/075657.html
Haiying
I think wolfgang's gripe is about putting the code into generic
On Tue, 2010-11-30 at 08:00 -0700, Wolfgang Denk wrote:
Hello everybody.
I apologise for being a bit late with this announcement:
* U-Boot v2010.12-rc2 was released on Sunday, November 28.
* Release v2010.12 is (still) scheduled in 13 days:
on December 13, 2010.
Please help
On Thu, 2010-11-25 at 09:00 -0700, Wolfgang Denk wrote:
As we try to get rid of board specific config.mk files we must
provide a way for board specific settings of the LDSCRIPT variable
(path to the linker script) where needed.
We now implement the following hierarchy:
- Highest priority
On Thu, 2010-11-25 at 10:19 -0700, Wolfgang Denk wrote:
Dear Haiying Wang,
In message 1290702018.2007.4.ca...@haiying-laptop you wrote:
- If CONFIG_SYS_LDCONFIG is not set, and the system is booting
from
NAND (CONFIG_NAND_U_BOOT is set), then a board specific linker
script
On Thu, 2010-11-25 at 09:00 -0700, Wolfgang Denk wrote:
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Kim Phillips kim.phill...@freescale.com
---
Kim, allthough the 83xx boards appear to build fine at first glance,
some (or all?) of the NAND boot images are 4 GB in size. Could you
please
On Thu, 2010-11-25 at 11:32 -0700, Wolfgang Denk wrote:
Dear Haiying Wang,
In message 1290709405.2007.16.ca...@haiying-laptop you wrote:
I think the u-boot.lds in nand_spl/board/freescale/mpc83xx/ needs to
have the fix as well.
Which fix do you mean?
I see two such files
On Thu, 2010-11-25 at 11:28 -0700, Wolfgang Denk wrote:
Dear Haiying Wang,
In message 1290708988.2007.13.ca...@haiying-laptop you wrote:
u-boot-nand.lds is not in board/$(BOARDDIR) for 85xx at least,
it is
in
$(SRCTREE)/$(CPUDIR)/
This is not correct - situation before
On Tue, 2010-11-23 at 13:57 -0700, Wolfgang Denk wrote:
Dear Haiying Wang,
Does CONFIG_TPL_UBOOT make sense to you if I replace
CONFIG_SYS_TPL_BOOT
with it?
I cannot answer this. Don't understand any of this.
Maybe you can re-think this again and try to make it less complex
On Thu, 2010-11-04 at 14:22 -0400, Haiying Wang wrote:
On Thu, 2010-11-04 at 09:36 -0700, Peter Tyser wrote:
Glad to hear. I'll submit an official patch shortly. Just to make
sure, have you tried running one of the nand-spl images after the
patch
I sent yesterday? It'd be good to get
Dear Wolfgang,
On Mon, 2010-11-08 at 16:36 -0700, Wolfgang Denk wrote:
Dear Haiying Wang,
Why it looks broken? I do need CONFIG_NAND defined for 8536DS nand
build. For building nand uboot, 2 images are needed, one is 4K
nand_spl
Yes. But there is also MPC8536DS and MPC8536DS_36BIT
On Tue, 2010-11-09 at 09:23 -0700, Wolfgang Denk wrote:
Dear Haiying Wang,
Is this all the error messages you get? Normally tehre should be
another message, for example:
[filename]:[lineno]:[column]: warning: this is the location of the
previous definition
On Tue, 2010-11-09 at 14:11 -0700, Wolfgang Denk wrote:
Dear Scott Wood,
In message 20101109143747.685f9...@udp111988uds.am.freescale.net you
wrote:
I don't see how
#ifdef NAND_SPL
#define CONFIG_SYS_TEXT_BASE xxx
#else
#define CONFIG_SYS_TEXT_BASE yyy
#endif
is more of a
Dear Wolfgang,
On Sun, 2010-11-07 at 14:31 -0700, Wolfgang Denk wrote:
Dear Haiying Wang,
In message 1288970062.1855.44.ca...@haiying-laptop you wrote:
Wolfgang's latest commit to change all TEXT_BASE to
CONFIG_SYS_TEXT_BASE
breaks the build for nand_spl. He defined
On Mon, 2010-11-08 at 09:30 -0700, Wolfgang Denk wrote:
Dear Haiying Wang,
In message 1289230710.1900.27.ca...@haiying-laptop you wrote:
Before sending last email, I modified the CONFIG_SYS_TEXT_BASE in
8536DS
header file like this:
#ifdef CONFIG_NAND
#ifdef
Hi Scott,
Wolfgang's latest commit to change all TEXT_BASE to CONFIG_SYS_TEXT_BASE
breaks the build for nand_spl. He defined CONFIG_SYS_TEXT_BASE in board
header file for CONFIG_NAND, and renamed TEXT_BASE to
CONFIG_SYS_TEXT_BASE in nand_spl/board/.../Makefile. Then for
u-boot-spl, the
On Wed, 2010-11-03 at 13:38 -0700, Peter Tyser wrote:
I'd guess none of the functions in the SPL binary are referenced in
the
linker script or linker command line, so the linker thinks none of
them
are necessary and removes them.
Can you try the following patch:
I did a quick compile
On Thu, 2010-11-04 at 08:45 -0700, Peter Tyser wrote:
Can you explain what you mean? The binary needs to be 4K, right? So
it
can't be trimmed down. But there should be more available space in
that
4K region, eg (all tests on MPC8536DS_NAND_config):
/* After apply my patch sent yesterday
On Thu, 2010-11-04 at 09:36 -0700, Peter Tyser wrote:
Glad to hear. I'll submit an official patch shortly. Just to make
sure, have you tried running one of the nand-spl images after the
patch
I sent yesterday? It'd be good to get confirmation that the
-gc-sections doesn't have any
Peter,
Do you have any idea on why your commit:
commit fbe53f59bd40b3b1ab66dc98859e26589d64d1b7
Author: Peter Tyser pty...@xes-inc.com
Date: Wed Sep 29 14:05:56 2010 -0500
85xx: Use gc-sections to reduce image size
which made change to :
--- a/arch/powerpc/cpu/mpc85xx/config.mk
+++
On Wed, 2010-29-09 at 20:25 +0200, Wolfgang Denk wrote:
You submitted the same patch series twice, without any version ID in
the subject, and without any other indication about possible changes.
I am so sorry for sending the patchset twice. I did not add
smtp-server at the first time, then I
On Mon, 2010-16-08 at 12:23 +0200, Wolfgang Denk wrote:
Dear Haiying Wang,
In message 1281945897.24612.17.ca...@localhost.localdomain you wrote:
Once CONFIG_MIDDLE_STAGE_SRAM_BOOT is defined, CONFIG_SRAM_BOOT is enabled
to
generate u-boot-sram.bin which will run in the l2/l3 sram
On Mon, 2010-16-08 at 12:33 +0200, Wolfgang Denk wrote:
--- /dev/null
+++ b/board/freescale/p1021mds/bcsr.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2010 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms
On Mon, 2010-16-08 at 12:40 +0200, Wolfgang Denk wrote:
Dear Haiying Wang,
In message 1281947090.24612.23.ca...@localhost.localdomain you wrote:
and because some platforms need to load QE firmware from NAND flash(no NOR
flash), it makes qe_init to be called after nand_init.
Signed-off
introduced by commit cc9f607beb49d4d3556c326efb83a0a51784e484, it causes:
cmd_mmc.c:136:2: warning: missing terminating character
cmd_mmc.c:133: error: missing terminating character
make[1]: *** [cmd_mmc.o] Error 1
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
common/cmd_mmc.c
On Mon, 2010-16-08 at 07:42 +0200, Wolfgang Denk wrote:
Dear Haiying Wang,
Please keep in mind that patches shall be submitted against the
mainline repository, NOPT against any custodian branches.
This is to make sure everybody can apply and test these without
addinitional compatibility
so it can be called in other file.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
nand_spl/nand_boot_fsl_elbc.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/nand_spl/nand_boot_fsl_elbc.c b/nand_spl/nand_boot_fsl_elbc.c
index 9547d44..efac293 100644
the sram uboot
size as
small as possible.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
Makefile | 18 ++-
arch/powerpc/cpu/mpc85xx/cpu_init_nand.c | 31 +++-
arch/powerpc/cpu/mpc85xx/sram_boot/Makefile| 190
This fixes the compiling error for the board which doesn't have NOR flash
(so CONFIG_FLASH_BASE is not defined)
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
arch/powerpc/cpu/mpc85xx/cpu_init.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc
This patch supports P1021MDS NAND boot with the following features:
* Boot from NAND flash with SRAM BOOT support.(No NOR flash on this board)
* SPD DDR Initialization
Signed-off-by: Haiying Wang haiying.w...@freescale.com
Signed-off-by: Mohit Kumar mohit.ku...@freescale.com
Signed-off-by: Yu.Liu
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
arch/powerpc/include/asm/immap_85xx.h |6 ++
arch/powerpc/include/asm/immap_qe.h |7 ++-
2 files changed, 12 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm
and because some platforms need to load QE firmware from NAND flash(no NOR
flash), it makes qe_init to be called after nand_init.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
arch/powerpc/cpu/mpc83xx/cpu_init.c |8
arch/powerpc/cpu/mpc85xx/cpu_init.c |8
-off-by: Haiying Wang haiying.w...@freescale.com
---
arch/powerpc/cpu/mpc85xx/speed.c |4 ++
arch/powerpc/include/asm/immap_85xx.h | 13
board/freescale/p1021mds/p1021mds.c | 54 +
drivers/qe/uec.c | 36
On Mon, 2010-16-08 at 12:11 +0200, Wolfgang Denk wrote:
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 2c3be6d..1fbc0cc 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -327,7 +327,7 @@ int
On Mon, 2010-16-08 at 12:09 +0200, Wolfgang Denk wrote:
Dear Haiying Wang,
In message 1281945721.24612.11.ca...@localhost.localdomain you wrote:
so it can be called in other file.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
nand_spl/nand_boot_fsl_elbc.c |2
The patchset supports SRAM boot, P1021MDS NAND boot, P1021MDS QE/UEC, it
is against the git://git.denx.de/u-boot-mpc85xx.
Thanks.
Haiying
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- Increase the size of malloc to 512KB because MPC8569MDS needs more memory for
malloc to support up to eight Ethernet interfaces.
- Move Environment address out of uboot thus the saved environment variables
will not be erased after u-boot is re-programmed.
Signed-off-by: Haiying Wang haiying.w
We support up to 8 mac addresses in system eeprom, so we define the macro
MAX_NUM_PORTS to limit the mac_count to 8, and update the number of ethxaddr
according to mac_count.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
v4 change: white space clean up
board/freescale/common
() to initialize all UEC interfaces
for 83xx and 85xx.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
v2 change: Use the loop according to Wolfgang's comments on May 20th.
cpu/mpc83xx/cpu.c | 20 +
cpu/mpc85xx/cpu.c | 21 +
drivers/qe/uec.c | 225
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
v2 change: Adjust the code according to the change in patch 11/15
drivers/qe/uec.c | 17 +
drivers/qe/uec.h | 31 +--
2 files changed, 46 insertions(+), 2 deletions(-)
diff --git a/drivers
Rename riscRx/riscTx to risc_rx/risc_tx to comply with Codingstyle.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
This patch should be applied before the 15 patches I sent out yesterday
drivers/qe/uec.c | 32
drivers/qe/uec.h |4 ++--
2 files
Also define the QE_RISC_ALLOCATION_RISCs to MACROs instead of using enum, and
define MAX_QE_RISC for QE based silicons.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
Acked-by: Timur Tabi ti...@freescale.com
---
v2 change: rename riscRx and riscTx to risc_rx and risc_tx
drivers/qe/qe.c
We support up to 8 mac addresses in system eeprom, so we define the macro
MAX_NUM_PORTS to limit the mac_count to 8, and update the number of ethxaddr
according to mac_count.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
v2 change: define MAC_NUM_PORTS to limit the mac_count
board
We support up to 8 mac addresses in system eeprom, so we define the macro
MAX_NUM_PORTS to limit the mac_count to 8, and update the number of ethxaddr
according to mac_count.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
v3 change: Modify printf info and replace 8 with MAX_NUM_PORTS
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
board/freescale/mpc8569mds/bcsr.c |4
board/freescale/mpc8569mds/mpc8569mds.c | 30 ++
include/configs/MPC8569MDS.h| 23 +++
3 files changed, 57 insertions
-off-by: Haiying Wang haiying.w...@freescale.com
---
board/freescale/mpc8569mds/bcsr.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/board/freescale/mpc8569mds/bcsr.c
b/board/freescale/mpc8569mds/bcsr.c
index b895b4e..a936edb 100644
--- a/board/freescale/mpc8569mds
MPC8569 has 128K bytes MURAM.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
include/asm-ppc/immap_qe.h |9 +++--
1 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/include/asm-ppc/immap_qe.h b/include/asm-ppc/immap_qe.h
index 66a4735..55667ca 100644
--- a/include
the saved environment variables
will not be erased after u-boot is re-programmed.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
Signed-off-by: Dave Liu dave...@freescale.com
---
include/configs/MPC8569MDS.h | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git
Some QE chips like 8569 need more SNUM numbers for supporting 4 UECs in RGMII-
1000 mode.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
Acked-by: Timur Tabi ti...@freescale.com
---
drivers/qe/qe.c| 15 ---
drivers/qe/qe.h|1 -
include/asm-ppc
MPC8569 UART1 signals are muxed with PortF bit[9-12], we need to define
those pins before using UART1.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
board/freescale/mpc8569mds/mpc8569mds.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/board/freescale
Also define the QE_RISC_ALLOCATION_RISCs to MACROs instead of using enum, and
define MAX_QE_RISC for QE based silicons.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
Acked-by: Timur Tabi ti...@freescale.com
---
drivers/qe/qe.c|3 ---
drivers/qe/qe.h| 17
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
drivers/qe/uec.c | 17 +
drivers/qe/uec.h | 31 +--
2 files changed, 46 insertions(+), 2 deletions(-)
diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c
index deeb947..7649f9f 100644
Here is the patchset for adding new features for QE UEC and MPC8569MDS
board. Please review this patchset and ignore the one(9 patches) I sent
out some weeks ago, since there are some update in the new patches.
Thanks.
Haiying
___
U-Boot mailing list
This patch supports UCC working at RMII mode on PIB board, fixup fdt blob to
support rmii in kernel. It also changes the name of enable_mpc8569mds_qe_mdio to
enalbe_mpc8569mds_qe_uec which is more accurate.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
board/freescale/mpc8569mds
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
cpu/mpc85xx/cpu.c |6 +
cpu/mpc85xx/fdt.c |4 ++-
drivers/qe/uec.c | 66 -
3 files changed, 74 insertions(+), 2 deletions(-)
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx
Signed-off-by: Haiying Wang haiying.w...@freescale.com
Signed-off-by: Yu Liu yu@freescale.com
---
include/configs/MPC8569MDS.h | 10 +-
1 files changed, 9 insertions(+), 1 deletions(-)
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index ea996ff..c87e51d
Signed-off-by: Haiying Wang haiying.w...@freescale.com
Acked-by: Timur Tabi ti...@freescale.com
---
cpu/mpc85xx/cpu.c|4
cpu/mpc85xx/speed.c | 15 ++-
include/asm-ppc/immap_85xx.h |2 ++
include/e500.h |1 +
4 files changed, 21
On MPC8569MDS board, UCC6 and UCC8 can be configured to work at SGMII mode via
UEM on PB board. Since MPC8569 supports up to 4 Gigabit Ethernet ports, we
disable UEC6 and UEC8 by default.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
include/configs/MPC8569MDS.h | 25
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
doc/README.mpc8569mds | 78 +
1 files changed, 78 insertions(+), 0 deletions(-)
create mode 100644 doc/README.mpc8569mds
diff --git a/doc/README.mpc8569mds b/doc/README.mpc8569mds
new
We support up to 8 mac addresses in system eeprom, so we'd limit the mac_count
to 8, and update the number of ethxaddr if there is more than 4 ethernet ports.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
board/freescale/common/sys_eeprom.c | 11 +--
1 files changed, 9
Signed-off-by: Haiying Wang haiying.w...@freescale.com
Acked-by: Timur Tabi ti...@freescale.com
---
v2 change: Fix the indention issue pointed by Scott, and add Acked-by.
cpu/mpc85xx/cpu.c|4
cpu/mpc85xx/speed.c | 13 +
include/asm-ppc/immap_85xx.h
Also define the QE_RISC_ALLOCATION_RISCs to MACROs instead of using enum, and
define MAX_QE_RISC for QE based silicons.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
drivers/qe/qe.c|3 ---
drivers/qe/qe.h| 15 ++-
drivers/qe/uec.c
MPC8569MDS board needs more memory for malloc because it will support four
Ethernet interfaces.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
include/configs/MPC8569MDS.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/configs/MPC8569MDS.h b
Signed-off-by: Haiying Wang haiying.w...@freescale.com
Signed-off-by: Yu Liu yu@freescale.com
---
include/configs/MPC8569MDS.h | 10 +-
1 files changed, 9 insertions(+), 1 deletions(-)
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index b0af5dc..2cba98f
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
cpu/mpc85xx/cpu.c|4
cpu/mpc85xx/speed.c | 13 +
include/asm-ppc/immap_85xx.h |2 ++
include/e500.h |1 +
4 files changed, 20 insertions(+), 0 deletions(-)
diff --git
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
board/freescale/mpc8569mds/bcsr.c |4
board/freescale/mpc8569mds/mpc8569mds.c | 30 ++
include/configs/MPC8569MDS.h| 23 +++
3 files changed, 57 insertions
MPC8569 UART1 signals are muxed with PortF bit[9-12], we need to define
those pins before using UART1.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
board/freescale/mpc8569mds/mpc8569mds.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/board/freescale
MPC8569 has 128K bytes MURAM.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
include/asm-ppc/immap_qe.h |9 +++--
1 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/include/asm-ppc/immap_qe.h b/include/asm-ppc/immap_qe.h
index 9530b29..7613b5c 100644
--- a/include
This patch supports UCC working at RMII mode on PIB board, fixup fdt blob to
support rmii in kernel. It also changes the name of enable_mpc8569mds_qe_mdio to
enalbe_mpc8569mds_qe_uec which is more accurate.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
board/freescale/mpc8569mds
Some QE chips like 8569 need more SNUM numbers for supporting 4 UECs in RGMII-
1000 mode.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
drivers/qe/qe.c| 13 +++--
drivers/qe/qe.h|1 -
include/asm-ppc/immap_qe.h |3 +++
3 files changed, 14
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