Thanks Gerald!

Does anyone by chance have a copy of AM572x_cortexa15_cpu0_startup.gel or 
AM572x_cortexa15_cpu1_startup.gel hanging around somewhere??

TI e2e pointed me yesterday in the direction of a wiki (  
processors.wiki.ti.com/.../AM572x_GP_EVM_Hardware_Setup 
<http://processors.wiki.ti.com/index.php/AM572x_GP_EVM_Hardware_Setup#CCS_Setup>)
 
which describes in general how to configure CCS to initialize your target 
prior to debugging and how to get around the PMIC shutdown issue.  That 
wiki specifies the use of CCSv6 instead of CCSv7.

One of the setup steps is to attach a set of CCS GEL file initialization 
scripts to each core on the 572x such that when CCS establishes a 
connection with the target, it calls each of the GEL files to initialize 
each of the cores prior to JTAG debugging.  One of the GEL files, I 
understand, sends an I2C message to the PMIC to leave it on all the time.

Two of the key GEL files, AM572x_cortexa15_cpu0_startup.gel and 
AM572x_cortexa15_cpu1_startup.gel are missing from all of the CCS versions 
I have successfully installed (CCS 6.1.3, 6.2, 7.2). However, one version 
of CCS, 6.1.1 which errors out when I try to install it, claims to contain 
these GEL files - but the installer doesn't get far enough to unpack the 
ccsv6 directory so I can see if these files are there.

I am working with TI on this and I understand the CCS team is looking into 
this, but am wondering if some of the beagleboard community has already 
gotten around this issue while TI is munching on the problem....

I did find, AM571x_cortexa15_cpu0_startup.gel and I will try to hack that up

Or if there's an easier way to setup the 572xEVM/BeagleBoard-X15 target 
prior to JTAG debugging of the SPL or something else to consider, I would 
greatly appreciate it!

Thanks in advance!!
 

On Wednesday, August 16, 2017 at 10:01:32 AM UTC-5, gcoley1 wrote:

> Yes
>
>  
>
> Gerald
>
>  
>
>  
>
> *From:* beagl...@googlegroups.com <javascript:> [mailto:
> beagl...@googlegroups.com <javascript:>] *On Behalf Of *Jeff Andich
> *Sent:* Wednesday, August 16, 2017 9:17 AM
> *To:* BeagleBoard <beagl...@googlegroups.com <javascript:>>
> *Cc:* raulra...@outlook.com <javascript:>
> *Subject:* [beagleboard] Re: JTAG Debugging - 2 Code Composers on the 
> Same Machine - One under Ubuntu - The Other under Windows
>
>  
>
> Quick Question on the BeagleBoard-X15's which are now available:
>
>  
>
> On the BB-X15, does the PMIC shutdown after 7 seconds like on TI am572xEVM 
> rev A3?
>
>  
>
> I'm fighting this right now as I'm attempting to connect CCS7.2 to the 
> A15_0 core using the XDS100v2 emulator.
>
>  
>
> Thanks!
>
>  
>
> Jeff
>
>  
>
>  
>
> On Monday, August 14, 2017 at 11:05:55 AM UTC-5, Jeff Andich wrote:
>
> Thanks!
>
>  
>
> Well what's driving Linux on this project is the software team is 
> deploying a .Net application over mono-runtime which will run on the A15 
> cores.  Our software team can test their .NET application on a workstation, 
> and then on the embedded target.  This is facilitated by the 
> BeagleBoard-X15 image being Debian-based.  
>
>  
>
> Am trying to get familiar with debugging of SPL, the early stages of 
> u-boot, and any other areas where JTAG could be useful via JTAG for 
> troubleshooting of our custom hardware board where we're doing a Linux 
> board port.
>
>  
>
> Update - Now Have an Ubuntu native installation - CCS doesn't appear to 
> hang - can connect the target via JTAG and view registers
>
>  
>
> But haven't yet figured out how to correctly load the SPL, run, and step 
> through it. Also the TI board port series shows CCS 5.? which demonstrates 
> debugging of the SPL via first loading the .bin file using a memory load to 
> the "load address" followed by loading the symbol information.  I haven't 
> yet found the "memory load" option on CCS 7.2.
>
>  
>
> I will try to bring up the beagle-board-patched 2017.01 u-boot-spl first, 
> and then if that looks like a stumbling block will temporarily move to the 
> TI SDK Linux u-boot so I can ask them questions about this process.
>
>  
>
> Then I will try to post up any useful progress here if that's desired...
>
>  
>
> Thanks and FYI,
>
>  
>
>  
>
> On Saturday, August 12, 2017 at 10:06:49 AM UTC-5, raulra...@outlook.com 
> wrote:
>
> I have experience with various C6x DSP EVM and custom boards, but I've 
> never worked with a Sitara board.
>
>  
>
> What is driving the need to use Linux in the development/debug workflow? 
> Is it development on the ARM portion, or development on the C6x DSP? Or 
> both?
>
>  
>
> I recently ordered the Beagleboard x15 (just got a batch at Digikey of the 
> Rev C's get 'em while they're hot), so I'll be tackling a similar situation 
> soon. I was figuring that since CCS can run on Windows it would cover at 
> least the DSP part of development. Then for any Linux part, I could use 
> Visual Studio '17 with the Linux dev/debug support (just need SSH and 
> compiler on target).
>
>  
>
> I'm not against working in Linux per se, and I definitely don't mind 
> targeting Linux for embedded work, but I have my main dev gear running 
> Windows and I don't want to lug around extra gear.
>
>  
>
> Raul
>
>  
>
>  
>
> -- 
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