Hi, After a compile fails, it's worth checking the timing report in the compile directory ..../XPS_ROACH_BASE/implementation/system.twr Whilst a little bit cryptic, the report should at least give you some idea of which bits of the design are causing timing failure. It becomes reasonably clear if it's adders in the FIR, or casts in the FFT for example.
Cheers, Jack PS. looking forward to a writeup of that 375MHz design :) On 3 September 2010 10:24, Andrew Martens <[email protected]> wrote: > Hi > > To add to Jason's suggestions: Conversion latency => 3 > > The documentation on the FFT blocks at > http://casper.berkeley.edu/wiki/Block_Documentation is quite recent and > contains some suggestions and explanations. > > Good luck > > Regards > Andrew > > >
