> Jason, I've found that multipliers and adders don't get merged into the same > DSP48 slice, even when the latencies are set properly (3 cycles multiply, 1 > cycle add). Have you seen this merge occur in a design?
Yes, but it doesn't work (at least in 10.1) if you have a cast or even slice block or something in between (hence the optimisation for virtex 5 in the FFT). You literally need a multiplier (with latency of 2 or less) going directly into an adder (with latency of 1 or less). This should result in a registered input and output DSP48 slice. Be careful of defining the precision of the adder and multiplier too. Jason
