Hi Mark, That worked. After updating the libraries xsg core config was set to default Roach.
Thanks, Nimish On Oct 5, 2012, at 6:10 PM, Mark Wagner <[email protected]> wrote: It's in both, you'll need to specify ROACH2 in the xsg_core_config block though. Mark On Fri, Oct 5, 2012 at 3:06 PM, Nimish Sane <[email protected]> wrote: > Mark, > > This is bwrc repo or ska-sa? I am using ska-sa and could not find it. > > Thanks, > > Nimish > > On Oct 5, 2012, at 6:01 PM, Mark Wagner <[email protected]> wrote: > > Hi Nimish, > > If you pull the new 10gbe_v2 yellowblock from the most recent repo, all of > those options should be available - sfp+, roach2, etc. > > Mark > > > On Fri, Oct 5, 2012 at 2:57 PM, Nimish Sane <[email protected]> wrote: > >> Hi Wes, >> >> I just updated to the latest libraries. Great work! I am looking forward >> to using those. I have a quick question. Does ten_Gbe_v2 block support >> Roach2? The "port" parameter on the yellow block can be set to between 0 >> and 3. I understand that Roach 2 will have 6 CX4 ports (3 each per >> mezzanine card). How does that map to the yellow block? >> >> Also, I remember from the casper workshop that there was going to be a >> setting to select between CX4 and SFP+ connection. Do you know what's the >> status with that? >> >> Thanks, >> >> Nimish >> >> On Wed, Oct 3, 2012 at 8:10 AM, Andrew Martens <[email protected]> wrote: >> >>> Hi Dave, Wes >>> >>> We could probably write a little Wishbone-to-OPB module and plug that in >>> front of the OPB yellow blocks for some things. Messing with the >>> internals of yellow blocks that we don't have hardware for could be >>> dangerous e.g ADCs. Ideally people would help out with yellow blocks >>> they have hardware for and have expertise in. >>> >>> Regards >>> Andrew >>> >>> On Wed, 2012-10-03 at 13:29 +0200, Wesley New wrote: >>> > Hi Dave, >>> > >>> > >>> > Unfortunately the move to wishbone will need to be done en mass. >>> > >>> > >>> > Wes >>> > >>> > On Thu, Sep 27, 2012 at 7:40 PM, David MacMahon >>> > <[email protected]> wrote: >>> > Hi, Wes, >>> > >>> > Are you converting all yellow blocks to wishbone en masse or >>> > can they be converted one by one over time? >>> > >>> > Thanks, >>> > Dave >>> > >>> > On Sep 27, 2012, at 10:23 AM, Wesley New wrote: >>> > >>> > > Hi Rurik >>> > > >>> > > These updates don't contain the wishbone port, that is the >>> > next item >>> > > on my to-do list. >>> > > >>> > > Wes >>> > > >>> > > On 9/27/12, Rurik A. Primiani <[email protected]> >>> > wrote: >>> > >> Hi Wes, >>> > >> >>> > >> Great work! I look forward to using the newer tools. Just a >>> > quick >>> > >> question, does this update include the migration to the >>> > Wishbone bus >>> > >> discussed at the workshop? >>> > >> >>> > >> Best, >>> > >> Rurik >>> > >> >>> > >> On 9/26/12 9:01 AM, Wesley New wrote: >>> > >>> Good Day all, >>> > >>> >>> > >>> We have updated the existing MSSGE toolflow to work with >>> > the Xilinx 14.2 >>> > >>> tools and Matlab2012a. I have provided a wikipage with all >>> > the details >>> > >>> and how to get an environment setup, available at: >>> > >>> >>> > >>> https://casper.berkeley.edu/wiki/MSSGE_Setup_with_Xilinx_14.2_and_Matlab_2012a >>> > >>> >>> > >>> >>> > >>> The ska-sa mlib_devel repository currently hosts these >>> > changes and can >>> > >>> be found at: https://github.com/ska-sa/mlib_devel. So feel >>> > free to start >>> > >>> using the latest tools and post any issues/feeback to the >>> > mailing list. >>> > >>> >>> > >>> Thanks >>> > >>> >>> > >>> Wesley >>> > >> >>> > > >>> > >>> > >>> > >>> > >>> >>> >>> >>> >> >
