On Wed, May 27, 2009 at 02:42:15AM +0400, Alexander Gordeev wrote: > Hi Luc, > > On Tuesday 26 May 2009 14:19:26 you wrote: > > Can you provide the output of lspci -vvnxxx so that we: > > * get device/subsystem id pairs for the board enable table. > > * can spot the location of the pmio base address and make this function > > useful for both cases. > > Sure, attached it. > > -- > Alexander
Device: NVIDIA CK804 LPC > 00:01.0 0601: 10de:0050 (rev a3) Dump of some extra io resource areas in pci config space of the lpc: > 60: 01 10 00 00 01 14 00 00 01 18 00 00 00 00 f9 ff This is it: ^^ ^^ ^^ ^^ Offset 0xE1 in this "System control area" is where we do our magic. The one in the trac interface uses a different offset in probably the same resource, because it is mcp55 or younger. I will write up a patch for this and send it in.. Luc Verhaegen -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
