Two patches yet again.
CARing for the Intel XE 7501 Dev Kit.
Signed-off-by: Alexandru Gagniuc <mr.nuke...@gmail.com>
Index: src/mainboard/intel/xe7501devkit/Kconfig
===================================================================
--- src/mainboard/intel/xe7501devkit/Kconfig (revision 6429)
+++ src/mainboard/intel/xe7501devkit/Kconfig (working copy)
@@ -1,3 +1,23 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2011 Alexandru Gagniuc <mr.nuke...@gmail.com>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
if BOARD_INTEL_XE7501DEVKIT
config BOARD_SPECIFIC_OPTIONS # dummy
@@ -8,7 +28,6 @@
select SOUTHBRIDGE_INTEL_I82870
select SOUTHBRIDGE_INTEL_I82801CX
select SUPERIO_SMSC_LPC47B272
- select ROMCC
select HAVE_HARD_RESET
select BOARD_HAS_HARD_RESET
select HAVE_PIRQ_TABLE
Index: src/mainboard/intel/xe7501devkit/romstage.c
===================================================================
--- src/mainboard/intel/xe7501devkit/romstage.c (revision 6429)
+++ src/mainboard/intel/xe7501devkit/romstage.c (working copy)
@@ -1,3 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Alexandru Gagniuc <mr.nuke...@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
#include <stdint.h>
#include <device/pci_def.h>
#include <arch/io.h>
@@ -10,7 +30,6 @@
#include <console/console.h>
#include "southbridge/intel/i82801cx/early_smbus.c"
#include "northbridge/intel/e7501/raminit.h"
-#include "cpu/x86/lapic/boot_cpu.c"
#include "northbridge/intel/e7501/debug.c"
#include "superio/smsc/lpc47b272/early_serial.c"
#include "cpu/x86/mtrr/earlymtrr.c"
@@ -19,10 +38,12 @@
#define SERIAL_DEV PNP_DEV(0x2e, LPC47B272_SP1)
+#if 0 /* not used, so just leave out */
static void hard_reset(void)
{
outb(0x0e, 0x0cf9);
}
+#endif
static inline int spd_read_byte(unsigned device, unsigned address)
{
@@ -33,8 +54,7 @@
#include "northbridge/intel/e7501/reset_test.c"
#include "lib/generic_sdram.c"
-// This function MUST appear last (ROMCC limitation)
-static void main(unsigned long bist)
+void main(unsigned long bist)
{
static const struct mem_controller memctrl[] = {
{
@@ -47,7 +67,7 @@
if (bist == 0) {
// Skip this if there was a built in self test failure
- early_mtrr_init();
+ /* MTRR init is now handled in cache_as_ram.inc */
enable_lapic();
}
CARing for the Intel i82801cx southbridge.
Removed a unused variable which caused a build error.
Signed-off-by: Alexandru Gagniuc <mr.nuke...@gmail.com>
Index: src/southbridge/intel/i82801cx/early_smbus.c
===================================================================
--- src/southbridge/intel/i82801cx/early_smbus.c (revision 6429)
+++ src/southbridge/intel/i82801cx/early_smbus.c (working copy)
@@ -1,3 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Alexandru Gagniuc <mr.nuke...@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
#include <device/pci_ids.h>
#include "i82801cx.h"
@@ -85,7 +105,6 @@
static int smbus_read_byte(unsigned device, unsigned address)
{
- unsigned char global_control_register;
unsigned char global_status_register;
unsigned char byte;
--
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