See patch
Converts the Supermicro X6DHE-G to use CAR. Signed-off-by: Alexandru Gagniuc <mr/[email protected]>
Index: src/mainboard/supermicro/x6dhe_g/Kconfig =================================================================== --- src/mainboard/supermicro/x6dhe_g/Kconfig (revision 6429) +++ src/mainboard/supermicro/x6dhe_g/Kconfig (working copy) @@ -1,3 +1,23 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2011 Alexandru Gagniuc <[email protected]> +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + if BOARD_SUPERMICRO_X6DHE_G config BOARD_SPECIFIC_OPTIONS # dummy @@ -8,7 +28,6 @@ select SOUTHBRIDGE_INTEL_ESB6300 select SOUTHBRIDGE_INTEL_PXHD select SUPERIO_WINBOND_W83627HF - select ROMCC select HAVE_HARD_RESET select BOARD_HAS_HARD_RESET select HAVE_OPTION_TABLE Index: src/mainboard/supermicro/x6dhe_g/watchdog.c =================================================================== --- src/mainboard/supermicro/x6dhe_g/watchdog.c (revision 6429) +++ src/mainboard/supermicro/x6dhe_g/watchdog.c (working copy) @@ -1,3 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Alexandru Gagniuc <[email protected]> + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <device/pnp_def.h> #define NSC_WD_DEV PNP_DEV(0x2e, 0xa) @@ -5,6 +25,7 @@ #define ESB6300_WDBASE 0x400 #define ESB6300_GPIOBASE 0x500 +#ifdef DEFINED_BUT_NOT_USED static void disable_sio_watchdog(device_t dev) { #if 0 @@ -17,7 +38,7 @@ pnp_set_enable(dev, 0); #endif } - +#endif /* DEFINED_BUT_NOT_USED */ static void disable_esb6300_watchdog(void) { /* FIXME move me somewhere more appropriate */ @@ -47,9 +68,9 @@ outw(0x0002, base + 0x06); } +#if 0 static void disable_jarell_frb3(void) { -#if 0 device_t dev; unsigned long value, base; dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0); @@ -86,8 +107,8 @@ outl(value, base + 0x38); value &= ~(1 << 16); outl(value, base + 0x38); +} #endif -} static void disable_watchdogs(void) { Index: src/mainboard/supermicro/x6dhe_g/romstage.c =================================================================== --- src/mainboard/supermicro/x6dhe_g/romstage.c (revision 6429) +++ src/mainboard/supermicro/x6dhe_g/romstage.c (working copy) @@ -1,3 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Alexandru Gagniuc <[email protected]> + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <stdint.h> #include <device/pci_def.h> #include <arch/io.h> @@ -11,14 +31,12 @@ #include "southbridge/intel/esb6300/early_smbus.c" #include "northbridge/intel/e7520/raminit.h" #include "superio/winbond/w83627hf/w83627hf.h" -#include "cpu/x86/lapic/boot_cpu.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "debug.c" #include "watchdog.c" #include "reset.c" #include "superio/winbond/w83627hf/early_serial.c" #include "northbridge/intel/e7520/memory_initialized.c" -#include "cpu/x86/bist.h" #include <spd.h> #define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) @@ -34,9 +52,7 @@ 0 ) #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0) -static void mch_reset(void) {} static void mainboard_set_e7520_pll(unsigned bits) {} -static void mainboard_set_e7520_leds(void) {} static inline int spd_read_byte(unsigned device, unsigned address) { @@ -45,9 +61,8 @@ #include "northbridge/intel/e7520/raminit.c" #include "lib/generic_sdram.c" -#include "arch/x86/lib/stages.c" -static void main(unsigned long bist) +void main(unsigned long bist) { static const struct mem_controller mch[] = { { @@ -59,9 +74,9 @@ if (bist == 0) { /* Skip this if there was a built in self test failure */ - early_mtrr_init(); + /* MTTR init is now done in cache_ar_ram.inc */ if (memory_initialized()) - skip_romstage(); + return; } w83627hf_set_clksel_48(DUMMY_DEV); @@ -81,26 +96,10 @@ pci_write_config32(dev, 0xe8, 0x00000000); pci_write_config8(dev, 0xf0, 0x00); -#if 0 - display_cpuid_update_microcode(); - print_pci_devices(); -#endif #if 1 enable_smbus(); #endif -#if 0 -// dump_spd_registers(&cpu[0]); - int i; - for(i = 0; i < 1; i++) - dump_spd_registers(); -#endif + disable_watchdogs(); -// dump_ipmi_registers(); -// mainboard_set_e7520_leds(); sdram_initialize(ARRAY_SIZE(mch), mch); -#if 0 - dump_pci_devices(); - dump_pci_device(PCI_DEV(0, 0x00, 0)); - dump_bar14(PCI_DEV(0, 0x00, 0)); -#endif } Index: src/mainboard/supermicro/x6dhe_g/debug.c =================================================================== --- src/mainboard/supermicro/x6dhe_g/debug.c (revision 6429) +++ src/mainboard/supermicro/x6dhe_g/debug.c (working copy) @@ -1,5 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Alexandru Gagniuc <[email protected]> + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <spd.h> - +#ifdef DEFINED_BUT_NOT_USED static void print_reg(unsigned char index) { unsigned char data; @@ -278,7 +298,6 @@ print_debug_hex8(device); for(i = 0; (i < 256) ; i++) { - unsigned char byte; if ((i % 16) == 0) { print_debug("\n"); print_debug_hex8(i); @@ -311,7 +330,6 @@ print_debug_hex8(device); for(i = 0; (i < 8) ; i++) { - unsigned char byte; status = smbus_read_byte(device, 2); if (status < 0) { print_debug("bad device: "); @@ -326,3 +344,4 @@ print_debug("\n"); } } +#endif /* DEFINED_BUT_NOT_USED */
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