David Brownell <[email protected]> writes:
> On Thursday 29 January 2009, Kevin Hilman wrote:
>> The right thing to do is probably name the sysclks pllX_sysclkY
>> instead of simply sysclkY. Does that seem OK?
>
> That's better than doing it via comments, like my dm355 tweaks;
> yes, seems ok. Worth doing everywhere, not just for dm365.
OK, will add the pllX_ prefix.
> Another suggestion: have clock nodes for all the PLL taps,
> instead of eliding the divide-by-one taps and the ones that
> only feed one module. For consistency and clarity.
Not sure I follow the suggestion here...
So for example, on dm355 are you suggesting I add pll1_sysclk3 and
pll1_sysclk4 nodes instead of the vpbe and vpss nodes, or have
the single peripheral nodes as children of the sysclks?
Something like this: ?
static struct clk pll1_sysclk3 = {
.name = "pll1_sysclk3",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
static struct clk pll1_sysclk4 = {
.name = "pll1_sysclk4",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV4,
};
static struct clk vpbe_clk = {
.name = "vpbe",
.parent = &pll1_sysclk3,
.flags = CLK_PLL,
};
static struct clk vpss_clk = {
.name = "vpss",
.parent = &pll1_sysclk4,
.flags = CLK_PLL,
};
Kevin
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