Note that the worst situation may occur when both planes are equal,

 

In this PCB, they are more or less equal. It's an 8-layer stack (bottom/
Layer8=GND, Layer7=Signals, Layer6=GND, and .). But the signal traces in
Layer7 have now continuous return path in both L8 and L6.

 

Regards

Amund

 

.

 

 

 

 

Fra: Gert Gremmen 
Sendt: 18. mars 2020 09:52
Til: Amund Westin <[email protected]>; [email protected]
Emne: Re: [PSES] Stripline - discontinuity in adjacent ground planes

 

Any signal flowing in the SIGNAL layer, will when getting to the load have
to choose between 2 ground layers. (when ordinary vias are used)

The signal layer with the lowest impedance is that where a good mutual
coupling between SIGNAL current and GNDX

is assured al along. So just verify the trace of SIGNAL in both GND's and
you have your answer.

Note that the worst situation may occur when both planes are equal, because
the ground current may

be cut in 2 parts and you lost easy control on what happens. Therefore use
just 1 ground plane only.

(in this 3 layer situation). Note that 1% corresponds to 40 dB, so if 99%
flows where you want it to,

1% may choose the wrong route and create a possible EMI problem and 40 dB
less is not much.

Buried via may be he answer to your plane problem, but does increase the
costs quite alot, where the 

single ground layer solution saves money.

The situation changes in 6 or 8 layer PCBS. There you will couple to the
closest

groundplane using buried vias only.

The generic answer is : control your return current, and avoid ambiguities.

Gert Gremmen

On 18-3-2020 9:38, Amund Westin wrote:

Let's say, part of a pcb stack looks like this  --- GND1 - SIGNAL - GND2

 

GND1 is solid copper fill

SIGNAL layer consists of high frequency lines LVDS, USB3.0, etc.

GND2 should be solid copper fill, but some traces are in that layer due to
space utilization reason. These traces are crossing 90 degrees the traces in
SIGNAL layer.

 

These traces in the GND2 will create gaps and therefore problems for the
return current for the high frequency lines I SINAL layer. 

 

But does it matter, as long as the GND1 layer is 100% filled, and there is
no disruption of the return current path for the traces in the adjacent
SIGNAL layer? 

 

 

Best regards

Amund Westin

 

 

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