On Fri, 22 Jun 2007, RogerN wrote: > Date: Fri, 22 Jun 2007 11:46:33 -0500 > From: RogerN <[EMAIL PROTECTED]> > Reply-To: "Enhanced Machine Controller (EMC)" > <[email protected]> > To: "Enhanced Machine Controller (EMC)" <[email protected]> > Subject: Re: [Emc-users] m5i20 Homing with index > > > Looking in REGMAP4 of the m5i20, CCR bit 5 ClearOnIndex sounds like it > fits the description of emc2's index-enable. Do any of the m5i20's pins > connect to the m5i20 CCR bit 5? > > CCR (Counter Control Register) Bit definitions: > > BIT9 CounterMode 0 = quadrature 1 = up/down > > BIT8 InputFilter 0 = No filter 1 = ~2 MHz input filter > > BIT7 Inbit > > BIT6 LCountenable 0 = count disabled 1 = counting enabled > > BIT5 ClearOnIndex 0 = no COI 1 = clear counter on index > > BIT4 Latchedindex 0 = no index 1 = index detected > > BIT3 IndexPolarity 0 = index active low 1 = index active high > > BIT2 Index Real time index status (reads) counter clear (writes) > > BIT1 B Real time input A status (read only) > > BIT0 A Read time input B status (read only) > > Thanks, > > RogerN >
EMCs version of HostMot is a little different, its register map is regmap4E: CCR (Counter Control Register) Bit definitions: BIT15 IndexMaskPol 0 = IM is active low 1 = IM is active high BIT14 IndexMaskEnable 0 = IM is dont-care 1 = IM must be true to detect in dex ( bit 14 read back is real time index mask status) BIT13 LatchOnce if 1, clear LOI (bit 12) when index detected BIT12 LatchOnIndex 0 = no LOI 1 = latch counter on index BIT11 AutoCount 0 = normal operation 1 = counter counts up at PCI clk rate BIT10 CounterMode 0 = quadrature 1 = up/down BIT9 QuadFilter 0 = ~11 Mhz filter 1 = ~4 MHz filter BIT8 LocalHold 1 = hold counter 1 = counter can count BIT7 Indexgate 0 = index anytime 1 = index detected only when A=B =0 BIT6 ClearOnce if 1, clear COI (bit5) when index detected BIT5 ClearOnIndex 0 = no COI 1 = clear counter on index BIT4 IndexPol 0 = active low index 1 = active high index BIT3 LatchOnRead 1 = latch on read (Transparent mode) BIT2 LocalClear Real time index status (reads) counter clear (writes) BIT1 B Real time input A status (read only) BIT0 A Read time input B status (read only) > > > > ------------------------------------------------------------------------- > This SF.net email is sponsored by DB2 Express > Download DB2 Express C - the FREE version of DB2 express and take > control of your XML. No limits. Just data. Click to get it now. > http://sourceforge.net/powerbar/db2/ > _______________________________________________ > Emc-users mailing list > [email protected] > https://lists.sourceforge.net/lists/listinfo/emc-users > Peter Wallace Mesa Electronics (\__/) (='.'=) This is Bunny. Copy and paste bunny into your (")_(") signature to help him gain world domination. ------------------------------------------------------------------------- This SF.net email is sponsored by DB2 Express Download DB2 Express C - the FREE version of DB2 express and take control of your XML. No limits. Just data. Click to get it now. http://sourceforge.net/powerbar/db2/ _______________________________________________ Emc-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/emc-users
