No, it would not get you to ns levels. The reason is that the computer is not always in a state where it can be interrupted. The hardware trigger (line going low) would happen but it has to wait until the computer looks at the trigger signal. It only does this between machine instructions and on X86 these take different lengths of time (details vary with CPU type) and also, mor important is that the kernel will some time disable interrupts. It tries not to do this for long but it is unavoidable in a multi-taking OS.
If you need perfect interrupt latency get a CPU where every instruction takes exactly one clock cycle and don't run a multi-task OS on it. I good example of a hardware interrupt on an X86 is then you connect a GPS receiver's "Pulse Pe Second" output to a port in the computer's main board. This is normally done when you need to build a stratum zero NTP server for accurate time. The pulse itself is typically within 10 or 20 nano seconds of that actual time of day when the UTC second "ticks". The interrupt handler in Linux is simple. It just reads the internal nanosecond counter inside the CPU and stores the current count of nanoseconds from power up on RAM and sets a flag to show it got a new value then returns. About a half dozen lines of C code. We look at the log of captured counters and see the delay from GPS pulse to interrupt hander is variable over a few microseconds. There are many thousands of NTP servers using GPS reference clocks and they all see about the same little on their interrupts, a few microseconds. To do better you need different hardware Nano seconds are HARD to do. Remember that the sped of light is about one foot per nano second. so you need to account of every inch of wire and then there are those cheap crystals they use inside your computer and driver boards that drift on the order of "a few parts per billion." "A few PPB" sounds good until you remember that a nanosecond is a billionth of a second. Bottom line is that PC hardware is going to be stuck at the "few micro seconds" level and NEVER get to "few nano seconds" level no matter what you try. But all is not lost you can buy programmable logic devices and micro controllers now for under five or ten bucks. I've > wanted to set this up on X86 through the parallel port for > some time (since about 2002, in fact) but it would take some > serious hacking on the PPMC driver. It looks like it might > be easier with the uspace / rt-preempt kernel than with > rtai. It would reduce latency/jitter to ns levels. > -- Chris Albertson Redondo Beach, California ------------------------------------------------------------------------------ Check out the vibrant tech community on one of the world's most engaging tech sites, SlashDot.org! http://sdm.link/slashdot _______________________________________________ Emc-users mailing list Emc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-users
