It is a valid method for BGAs, but Xilinx changed their app.s note from
recommending resist-defined pads to normal pads so maybe it's not such a
good technique after all...
Regards
Andy Gulliver
> -----Original Message-----
> From: Michael Reagan [mailto:[EMAIL PROTECTED]]
> Sent: 05 June 2001 16:52
> To: Protel EDA Forum
> Subject: Re: [PEDA] : Solder mask expansion rules
>
>
>
> David Cary wrote:
> > Would you mind sharing with us why one would ever use +0.1 mm
> and -0.1 mm
> > (rather than, say, completely tenting over that pad) ?
> >
>
> Dave,
>
> I was visiting TI's website the other day and this method was listed as an
> alternative for BGA pads. They had published related data for
> reliability
> but did not point out any advantages/ disadvantages to using this method.
> I am forwarding the question to our manufacturing engineer to see
> if he has
> any comments.
>
>
> Mike Reagan
> EDSI
> Frederick MD
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