John Doty wrote: > On Dec 2, 2008, at 8:06 PM, Dan McMahill wrote: > >> John Doty wrote: >>> On Dec 2, 2008, at 11:34 AM, al davis wrote: >>> >>>> On Tuesday 02 December 2008, John Doty wrote: >>>>> On the other hand, we already have in gEDA a simple, >>>>> flexible, concrete, well-documented format for graphics, >>>>> attributes, and netlist information: the schematic format. It >>>>> can even represent pure netlists without actual graphics. Why >>>>> not identify limitations of that format and enhance it? >>>> Nice joke. >>>> >>> Not a joke at all. You are invited to post pointers to clear, concise >>> documentation for a better candidate. But please nothing more like >>> that sales brochure disguised as a Verilog-AMS text you induced me to >>> buy... >> I'm sorry you don't like that book and that you haven't found a use >> for >> Verilog-A or Verilog-AMS. My experience has been that Verilog-A has >> been critical for many many real life simulation problems. I'm >> speaking >> as one who has written thousands of lines of Verilog-A code to solve >> real problems. >> >> I'll reiterate an assertion I made earlier. One of the big current >> challenges with those two tools is you can't get access currently to >> either without spending a lot of money. > > But it seems that you cannot even penetrate the fog of hype around > them without spending both a lot of time and money. I have no doubt > that in the hands of specialists these tools are very useful. But > such specialists can't generally comprehend what, say, an > astrophysicist needs from a nondispersive x-ray spectrometer design. > So, the astrophysicist can't get the job done himself (the fog > surrounding the tool's capabilities is too thick), nor can he get a > specialist to do the design.
I guess I haven't found the fog to be any thicker or clearer than any number of programming languages. But then again, I had some Verilog-HDL experience prior to Verilog-A and Verilog-AMS. I won't argue that you currently have to spend the money though. The time really wasn't bad. Now if you don't have access to the tools and you're not writing the tools, then yeah the book isn't that useful. But then again a book on perl, ruby, samba, or apache would also be fairly useless if you didn't actually have one of those tools at hand to work with. Perhaps the other issue is that those who do a lot with Verilog-A or Verilog-AMS are generally not in a position to freely discuss what exactly it was they did with it or and specifics of how they did what they did. -Dan _______________________________________________ geda-dev mailing list geda-dev@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-dev
