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(Updated April 22, 2012, 8:32 a.m.) Review request for Default. Description (updated) ------- Changeset 8963:eb9b72c1c919 --------------------------- X86: Break flags in to read and write sets Currently, each instruction specifies the flags it is going to read, write as a single set. This patch introduces separate read and write sets. This is required for reducing the RAW dependencies. If no flag bit needs to be read (empty read set), and all the flag bits are being written, then there is no need to read the flagbits register. The dependencies will be reduced further when the ccflagbits register is split into multiple registers. Diffs (updated) ----- src/arch/x86/isa/microops/fpop.isa 0bba1c59b4d1 src/arch/x86/isa/microops/regop.isa 0bba1c59b4d1 Diff: http://reviews.gem5.org/r/1161/diff/ Testing ------- Thanks, Nilay Vaish _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
