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configs/common/FSConfig.py <http://reviews.gem5.org/r/2301/#comment4659> I do not understand why this is not covered by the last statement, i.e. the Pci config space until the end of 64-bit space. configs/common/FSConfig.py <http://reviews.gem5.org/r/2301/#comment4660> It would be good to add a line describing where the values come from. configs/common/FSConfig.py <http://reviews.gem5.org/r/2301/#comment4661> Since the bus order is important, I'd suggest copying the statement around this from the patch summary and make sure it also appears in comments in the code. - Andreas Hansson On June 16, 2014, 1:06 a.m., Jiuyue Ma wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2301/ > ----------------------------------------------------------- > > (Updated June 16, 2014, 1:06 a.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > config: add ethernet support for x86 fullsystem > > This patch add a IGbE_e1000 ethernet device to x86 fs system. To make it work > properly, > following changes were also made to FSConfig.py: > > - add [mem_size-1(or 3GB for >4GB memory), 0xFFFFFFFF] to bridge's ranges > for kernel configured pci device memory, > access to pci address space will pass though membus to bridge > > - add IGbE_e1000 to x86_sys.pc.ethernet > > - connect x86_sys.pc.ethernet.pio/config/dma to x86_sys.iobus > > - swap bus_id of ISA/PCI in X86 IntelMPTable > In gem5 Pc::calcPciConfigAddr(), it required "assert(bus==0)", but linux > kernel cannot > config ethernet device connected to ISA bus, so we swap bus_id of ISA/PCI > > > Diffs > ----- > > configs/common/FSConfig.py b2850bdcec070052f3a0f5efa8bf748eca1f5d44 > > Diff: http://reviews.gem5.org/r/2301/diff/ > > > Testing > ------- > > > Thanks, > > Jiuyue Ma > > _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
