> On Dec. 24, 2015, 6:14 p.m., Joel Hestness wrote: > > src/mem/request.hh, line 163 > > <http://reviews.gem5.org/r/3185/diff/4/?file=52302#file52302line163> > > > > I'm still not sure I understand what this means. Why does a request > > need to be marked to indicate a kernel launch? I can understand if stale > > caches should be flushed (release) at the beginning or end of a kernel, but > > this should really be clearer. > > Tony Gutierrez wrote: > Yes, there is a distinction between regular acq/rel and kernel begin/end. > Kernel begin/end are acq/rel respectively with the additional KERNEL flag. > They are used to invalidate the caches on a kernel launch, and to writeback > the caches on a kernel end. They are also used to indicate to the CU itself > to launch/end a kernel when it receives a response. Is that clear? If so I > can add a comment to that effect.
Cool, thanks for clarifying. That's much clearer, and it would be nice to get this info into the comments. - Joel ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3185/#review7753 ----------------------------------------------------------- On Dec. 23, 2015, 4:50 p.m., Tony Gutierrez wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3185/ > ----------------------------------------------------------- > > (Updated Dec. 23, 2015, 4:50 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 11275:a9868b18de7a > --------------------------- > mem: misc flags for AMD gpu model > > This patch add support to mark memory requests/packets with attributes defined > in HSA, such as memory order and scope. > > > Diffs > ----- > > src/mem/protocol/RubySlicc_Exports.sm > d9a0136ab8cc4b3cf4821d064140b857e60db0dd > src/mem/protocol/RubySlicc_Types.sm > d9a0136ab8cc4b3cf4821d064140b857e60db0dd > src/mem/request.hh d9a0136ab8cc4b3cf4821d064140b857e60db0dd > src/mem/ruby/common/DataBlock.hh d9a0136ab8cc4b3cf4821d064140b857e60db0dd > src/mem/ruby/slicc_interface/RubyRequest.hh > d9a0136ab8cc4b3cf4821d064140b857e60db0dd > src/mem/ruby/system/RubyPort.cc d9a0136ab8cc4b3cf4821d064140b857e60db0dd > > Diff: http://reviews.gem5.org/r/3185/diff/ > > > Testing > ------- > > > Thanks, > > Tony Gutierrez > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
