On Jan. 13, 2016, 10:06 p.m., Tony Gutierrez wrote: > > There seems to be a few unrelated changes here.
I don't mind the getters (but please scope them in a doxygen comment block (there are already example of this in packet.hh). The minor little changes here and there I'd really like to see in a separate patch, with a description of what they do. I'd say this is really a basic principle of any changeset. At the moment I don't even know what they are for... - Andreas ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3185/#review7879 ----------------------------------------------------------- On Jan. 13, 2016, 9:24 p.m., Tony Gutierrez wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3185/ > ----------------------------------------------------------- > > (Updated Jan. 13, 2016, 9:24 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 11279:e858f2256ccb > --------------------------- > mem: misc flags for AMD gpu model > > This patch add support to mark memory requests/packets with attributes defined > in HSA, such as memory order and scope. > > > Diffs > ----- > > src/mem/ruby/common/DataBlock.hh d9a0136ab8cc4b3cf4821d064140b857e60db0dd > src/mem/ruby/slicc_interface/RubyRequest.hh > d9a0136ab8cc4b3cf4821d064140b857e60db0dd > src/mem/ruby/system/RubyPort.cc d9a0136ab8cc4b3cf4821d064140b857e60db0dd > src/mem/protocol/RubySlicc_Exports.sm > d9a0136ab8cc4b3cf4821d064140b857e60db0dd > src/mem/protocol/RubySlicc_Types.sm > d9a0136ab8cc4b3cf4821d064140b857e60db0dd > src/mem/request.hh d9a0136ab8cc4b3cf4821d064140b857e60db0dd > > Diff: http://reviews.gem5.org/r/3185/diff/ > > > Testing > ------- > > > Thanks, > > Tony Gutierrez > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
