# HG changeset patch
# User Korey Sewell <[email protected]>
# Date 1239342519 14400
# Node ID cdb3bc0078182a8deaf592707b55aca1bf9559bf
# Parent 64fcc70b469dc97e03fc1cd1a3bf7192e00e2b6f
Remove subinstructions eaComp/memAcc since unused in CPU Models. Instead,
create eaComp that is visible from StaticInst object. Gives InOrder model
capability of generating address without actually initiating access
diff -r 64fcc70b469d -r cdb3bc007818 src/arch/alpha/isa/mem.isa
--- a/src/arch/alpha/isa/mem.isa Fri Apr 10 01:47:53 2009 -0400
+++ b/src/arch/alpha/isa/mem.isa Fri Apr 10 01:48:39 2009 -0400
@@ -44,27 +44,17 @@ output header {{
/// Memory request flags. See mem_req_base.hh.
Request::Flags memAccessFlags;
- /// Pointer to EAComp object.
- const StaticInstPtr eaCompPtr;
- /// Pointer to MemAcc object.
- const StaticInstPtr memAccPtr;
/// Constructor
- Memory(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
- StaticInstPtr _eaCompPtr = nullStaticInstPtr,
- StaticInstPtr _memAccPtr = nullStaticInstPtr)
- : AlphaStaticInst(mnem, _machInst, __opClass),
- eaCompPtr(_eaCompPtr), memAccPtr(_memAccPtr)
+ Memory(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
+ : AlphaStaticInst(mnem, _machInst, __opClass)
{
}
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
- public:
-
- const StaticInstPtr &eaCompInst() const { return eaCompPtr; }
- const StaticInstPtr &memAccInst() const { return memAccPtr; }
+ public:
Request::Flags memAccFlags() { return memAccessFlags; }
};
@@ -80,10 +70,8 @@ output header {{
int32_t disp;
/// Constructor.
- MemoryDisp32(const char *mnem, ExtMachInst _machInst, OpClass
__opClass,
- StaticInstPtr _eaCompPtr = nullStaticInstPtr,
- StaticInstPtr _memAccPtr = nullStaticInstPtr)
- : Memory(mnem, _machInst, __opClass, _eaCompPtr, _memAccPtr),
+ MemoryDisp32(const char *mnem, ExtMachInst _machInst, OpClass
__opClass)
+ : Memory(mnem, _machInst, __opClass),
disp(MEMDISP)
{
}
@@ -99,10 +87,8 @@ output header {{
{
protected:
/// Constructor
- MemoryNoDisp(const char *mnem, ExtMachInst _machInst, OpClass
__opClass,
- StaticInstPtr _eaCompPtr = nullStaticInstPtr,
- StaticInstPtr _memAccPtr = nullStaticInstPtr)
- : Memory(mnem, _machInst, __opClass, _eaCompPtr, _memAccPtr)
+ MemoryNoDisp(const char *mnem, ExtMachInst _machInst, OpClass
__opClass)
+ : Memory(mnem, _machInst, __opClass)
{
}
@@ -142,32 +128,6 @@ def template LoadStoreDeclare {{
*/
class %(class_name)s : public %(base_class)s
{
- protected:
-
- /**
- * "Fake" effective address computation class for "%(mnemonic)s".
- */
- class EAComp : public %(base_class)s
- {
- public:
- /// Constructor
- EAComp(ExtMachInst machInst);
-
- %(BasicExecDeclare)s
- };
-
- /**
- * "Fake" memory access instruction class for "%(mnemonic)s".
- */
- class MemAcc : public %(base_class)s
- {
- public:
- /// Constructor
- MemAcc(ExtMachInst machInst);
-
- %(BasicExecDeclare)s
- };
-
public:
/// Constructor.
@@ -175,6 +135,8 @@ def template LoadStoreDeclare {{
%(BasicExecDeclare)s
+ %(EACompDeclare)s
+
%(InitiateAccDeclare)s
%(CompleteAccDeclare)s
@@ -183,6 +145,10 @@ def template LoadStoreDeclare {{
};
}};
+
+def template EACompDeclare {{
+ Fault eaComp(%(CPU_exec_context)s *, Trace::InstRecord *) const;
+}};
def template InitiateAccDeclare {{
Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
@@ -214,41 +180,18 @@ def template LoadStoreMemAccSize {{
}
}};
-def template EACompConstructor {{
- /** TODO: change op_class to AddrGenOp or something (requires
- * creating new member of OpClass enum in op_class.hh, updating
- * config files, etc.). */
- inline %(class_name)s::EAComp::EAComp(ExtMachInst machInst)
- : %(base_class)s("%(mnemonic)s (EAComp)", machInst, IntAluOp)
- {
- %(constructor)s;
- }
-}};
-
-
-def template MemAccConstructor {{
- inline %(class_name)s::MemAcc::MemAcc(ExtMachInst machInst)
- : %(base_class)s("%(mnemonic)s (MemAcc)", machInst, %(op_class)s)
- {
- %(constructor)s;
- }
-}};
-
def template LoadStoreConstructor {{
inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
- : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
- new EAComp(machInst), new MemAcc(machInst))
+ : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
{
%(constructor)s;
}
}};
-
def template EACompExecute {{
- Fault
- %(class_name)s::EAComp::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
+ Fault %(class_name)s::eaComp(%(CPU_exec_context)s *xc,
+ Trace::InstRecord *traceData) const
{
Addr EA;
Fault fault = NoFault;
@@ -261,32 +204,6 @@ def template EACompExecute {{
if (fault == NoFault) {
%(op_wb)s;
xc->setEA(EA);
- }
-
- return fault;
- }
-}};
-
-def template LoadMemAccExecute {{
- Fault
- %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- Addr EA;
- Fault fault = NoFault;
-
- %(fp_enable_check)s;
- %(op_decl)s;
- %(op_rd)s;
- EA = xc->getEA();
-
- if (fault == NoFault) {
- fault = xc->read(EA, (uint%(mem_acc_size)d_t&)Mem, memAccessFlags);
- %(memacc_code)s;
- }
-
- if (fault == NoFault) {
- %(op_wb)s;
}
return fault;
@@ -366,18 +283,17 @@ def template LoadCompleteAcc {{
}};
-def template StoreMemAccExecute {{
- Fault
- %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- Addr EA;
- Fault fault = NoFault;
-
- %(fp_enable_check)s;
- %(op_decl)s;
- %(op_rd)s;
- EA = xc->getEA();
+def template StoreExecute {{
+ Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
+ Trace::InstRecord *traceData) const
+ {
+ Addr EA;
+ Fault fault = NoFault;
+
+ %(fp_enable_check)s;
+ %(op_decl)s;
+ %(op_rd)s;
+ %(ea_code)s;
if (fault == NoFault) {
%(memacc_code)s;
@@ -401,10 +317,9 @@ def template StoreMemAccExecute {{
}
}};
-def template StoreCondMemAccExecute {{
- Fault
- %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
+def template StoreCondExecute {{
+ Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
+ Trace::InstRecord *traceData) const
{
Addr EA;
Fault fault = NoFault;
@@ -413,7 +328,7 @@ def template StoreCondMemAccExecute {{
%(fp_enable_check)s;
%(op_decl)s;
%(op_rd)s;
- EA = xc->getEA();
+ %(ea_code)s;
if (fault == NoFault) {
%(memacc_code)s;
@@ -437,10 +352,9 @@ def template StoreCondMemAccExecute {{
}
}};
-
-def template StoreExecute {{
- Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
+def template StoreInitiateAcc {{
+ Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc,
+ Trace::InstRecord *traceData) const
{
Addr EA;
Fault fault = NoFault;
@@ -460,75 +374,6 @@ def template StoreExecute {{
if (traceData) { traceData->setData(Mem); }
}
- if (fault == NoFault) {
- %(postacc_code)s;
- }
-
- if (fault == NoFault) {
- %(op_wb)s;
- }
-
- return fault;
- }
-}};
-
-def template StoreCondExecute {{
- Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- Addr EA;
- Fault fault = NoFault;
- uint64_t write_result = 0;
-
- %(fp_enable_check)s;
- %(op_decl)s;
- %(op_rd)s;
- %(ea_code)s;
-
- if (fault == NoFault) {
- %(memacc_code)s;
- }
-
- if (fault == NoFault) {
- fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
- memAccessFlags, &write_result);
- if (traceData) { traceData->setData(Mem); }
- }
-
- if (fault == NoFault) {
- %(postacc_code)s;
- }
-
- if (fault == NoFault) {
- %(op_wb)s;
- }
-
- return fault;
- }
-}};
-
-def template StoreInitiateAcc {{
- Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- Addr EA;
- Fault fault = NoFault;
-
- %(fp_enable_check)s;
- %(op_decl)s;
- %(op_rd)s;
- %(ea_code)s;
-
- if (fault == NoFault) {
- %(memacc_code)s;
- }
-
- if (fault == NoFault) {
- fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
- memAccessFlags, NULL);
- if (traceData) { traceData->setData(Mem); }
- }
-
return fault;
}
}};
@@ -581,26 +426,6 @@ def template StoreCondCompleteAcc {{
}
}};
-
-def template MiscMemAccExecute {{
- Fault %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- Addr EA;
- Fault fault = NoFault;
-
- %(fp_enable_check)s;
- %(op_decl)s;
- %(op_rd)s;
- EA = xc->getEA();
-
- if (fault == NoFault) {
- %(memacc_code)s;
- }
-
- return NoFault;
- }
-}};
def template MiscExecute {{
Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
@@ -700,9 +525,6 @@ def LoadStoreBase(name, Name, ea_code, m
iop = InstObjParams(name, Name, base_class,
{ 'ea_code':ea_code, 'memacc_code':memacc_code,
'postacc_code':postacc_code },
inst_flags)
- ea_iop = InstObjParams(name, Name, base_class,
- { 'ea_code':ea_code },
- inst_flags)
memacc_iop = InstObjParams(name, Name, base_class,
{ 'memacc_code':memacc_code,
'postacc_code':postacc_code },
inst_flags)
@@ -719,7 +541,6 @@ def LoadStoreBase(name, Name, ea_code, m
# corresponding Store template..
StoreCondInitiateAcc = StoreInitiateAcc
- memAccExecTemplate = eval(exec_template_base + 'MemAccExecute')
fullExecTemplate = eval(exec_template_base + 'Execute')
initiateAccTemplate = eval(exec_template_base + 'InitiateAcc')
completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
@@ -731,13 +552,10 @@ def LoadStoreBase(name, Name, ea_code, m
# (header_output, decoder_output, decode_block, exec_output)
return (LoadStoreDeclare.subst(iop),
- EACompConstructor.subst(ea_iop)
- + MemAccConstructor.subst(memacc_iop)
- + LoadStoreConstructor.subst(iop),
+ LoadStoreConstructor.subst(iop),
decode_template.subst(iop),
- EACompExecute.subst(ea_iop)
- + memAccExecTemplate.subst(memacc_iop)
- + fullExecTemplate.subst(iop)
+ fullExecTemplate.subst(iop)
+ + EACompExecute.subst(iop)
+ initiateAccTemplate.subst(iop)
+ completeAccTemplate.subst(iop)
+ memAccSizeTemplate.subst(memacc_iop))
diff -r 64fcc70b469d -r cdb3bc007818 src/arch/alpha/isa/pal.isa
--- a/src/arch/alpha/isa/pal.isa Fri Apr 10 01:47:53 2009 -0400
+++ b/src/arch/alpha/isa/pal.isa Fri Apr 10 01:48:39 2009 -0400
@@ -155,9 +155,7 @@ output header {{
int16_t disp;
/// Constructor
- HwLoadStore(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
- StaticInstPtr _eaCompPtr = nullStaticInstPtr,
- StaticInstPtr _memAccPtr = nullStaticInstPtr);
+ HwLoadStore(const char *mnem, ExtMachInst _machInst, OpClass
__opClass);
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
@@ -168,11 +166,8 @@ output decoder {{
output decoder {{
inline
HwLoadStore::HwLoadStore(const char *mnem, ExtMachInst _machInst,
- OpClass __opClass,
- StaticInstPtr _eaCompPtr,
- StaticInstPtr _memAccPtr)
- : Memory(mnem, _machInst, __opClass, _eaCompPtr, _memAccPtr),
- disp(HW_LDST_DISP)
+ OpClass __opClass)
+ : Memory(mnem, _machInst, __opClass), disp(HW_LDST_DISP)
{
memAccessFlags.clear();
if (HW_LDST_PHYS) memAccessFlags.set(Request::PHYSICAL);
diff -r 64fcc70b469d -r cdb3bc007818 src/cpu/SConscript
--- a/src/cpu/SConscript Fri Apr 10 01:47:53 2009 -0400
+++ b/src/cpu/SConscript Fri Apr 10 01:48:39 2009 -0400
@@ -49,6 +49,8 @@ execfile(models_db.srcnode().abspath)
# Template for execute() signature.
exec_sig_template = '''
virtual Fault execute(%(type)s *xc, Trace::InstRecord *traceData) const = 0;
+virtual Fault eaComp(%(type)s *xc, Trace::InstRecord *traceData) const
+{ panic("initiateAcc not defined!"); M5_DUMMY_RETURN };
virtual Fault initiateAcc(%(type)s *xc, Trace::InstRecord *traceData) const
{ panic("initiateAcc not defined!"); M5_DUMMY_RETURN };
virtual Fault completeAcc(Packet *pkt, %(type)s *xc,
diff -r 64fcc70b469d -r cdb3bc007818 src/cpu/inorder/inorder_dyn_inst.cc
--- a/src/cpu/inorder/inorder_dyn_inst.cc Fri Apr 10 01:47:53 2009 -0400
+++ b/src/cpu/inorder/inorder_dyn_inst.cc Fri Apr 10 01:48:39 2009 -0400
@@ -226,6 +226,13 @@ InOrderDynInst::execute()
}
Fault
+InOrderDynInst::calcEA()
+{
+ this->fault = this->staticInst->eaComp(this, this->traceData);
+ return this->fault;
+}
+
+Fault
InOrderDynInst::initiateAcc()
{
// @todo: Pretty convoluted way to avoid squashing from happening
@@ -275,16 +282,9 @@ void InOrderDynInst::deleteStages() {
}
Fault
-InOrderDynInst::calcEA()
-{
- return staticInst->eaCompInst()->execute(this, this->traceData);
-}
-
-Fault
InOrderDynInst::memAccess()
{
- //return staticInst->memAccInst()->execute(this, this->traceData);
- return initiateAcc( );
+ return initiateAcc();
}
void
diff -r 64fcc70b469d -r cdb3bc007818 src/cpu/inorder/pipeline_traits.cc
--- a/src/cpu/inorder/pipeline_traits.cc Fri Apr 10 01:47:53 2009 -0400
+++ b/src/cpu/inorder/pipeline_traits.cc Fri Apr 10 01:48:39 2009 -0400
@@ -99,8 +99,8 @@ bool createBackEndSchedule(DynInstPtr &i
if ( inst->isNonSpeculative() ) {
// skip execution of non speculative insts until later
} else if ( inst->isMemRef() ) {
- E->needs(AGEN, AGENUnit::GenerateAddr);
if ( inst->isLoad() ) {
+ E->needs(AGEN, AGENUnit::GenerateAddr);
E->needs(DTLB, TLBUnit::DataLookup);
E->needs(DCache, CacheUnit::InitiateReadData);
}
@@ -121,6 +121,7 @@ bool createBackEndSchedule(DynInstPtr &i
M->needs(DCache, CacheUnit::CompleteReadData);
} else if ( inst->isStore() ) {
M->needs(RegManager, UseDefUnit::ReadSrcReg, 1);
+ M->needs(AGEN, AGENUnit::GenerateAddr);
M->needs(DTLB, TLBUnit::DataLookup);
M->needs(DCache, CacheUnit::InitiateWriteData);
}
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