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Review request for Default. Summary ------- ARM: Mark prefetches as such and allow timing CPU to handle them. Diffs ----- src/arch/arm/faults.cc e78b6bba67ca src/arch/arm/isa/insts/ldr.isa e78b6bba67ca src/cpu/simple/timing.cc e78b6bba67ca Diff: http://reviews.m5sim.org/r/256/diff Testing ------- Thanks, Ali _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
