@cousteaulecommandant commented on this pull request.
> @@ -788,6 +788,64 @@ static TMParserMapGroup group_VERILOG[] = {
{N_("Variables"), TM_ICON_VAR, tm_tag_variable_t},
};
+static TMParserMapEntry map_SYSVERILOG[] = {
...oh and I need to re-do the unit test for Verilog since I've changed it, of
course.
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