#5506: LLVM AST : needs an LlvmType ctor to represent vectors so that LLVM can
generate SIMD instructions
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Reporter: erikd | Owner: dterei
Type: task | Status: new
Priority: normal | Component: Compiler (LLVM)
Version: 7.3 | Keywords:
Testcase: | Blockedby:
Os: Unknown/Multiple | Blocking:
Architecture: Unknown/Multiple | Failure: None/Unknown
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Ticket URL: <http://hackage.haskell.org/trac/ghc/ticket/5506#comment:1>
GHC <http://www.haskell.org/ghc/>
The Glasgow Haskell Compiler
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