Some insights into this SIIS topic: https://www.ibm.com/support/pages/identifying-%E2%80%9Cstore-instruction-stream%E2%80%9D-siis-inefficiency-using-cpu-mf-counters
Kind regards Bernd Am 08.02.2021 um 18:42 schrieb Pew, Curtis G:
On Feb 8, 2021, at 11:38 AM, Gibney, Dave <gib...@wsu.edu> wrote:PTR DC A(0) label L R15,PTR LTR R15,R15 BNZ CALLIT ... ... Code that always leaves the same value in R15 ST R15,PTR CALLIT BALR R14,R15 Still incur cache flush?If PTR is in the same cache line as your code, then yes.
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