LT's VS/PE-O tables have less columns than xe3plpd_lt_phy_buf_trans contains fields. This prevents casting block->tables to point at xe3plpd_lt_phy_buf_trans and parsing it trivially.
Parse each entry from every table into kzalloc'd buffers' matrix. Read number of tables and number of columns from the block. Assume that each table contains 16 rows. Inflate xe3plpd_lt_phy_buf_trans since each VBT-based value is stored on u32. Reducing the size will be done in separate commit. Add LT to workaround for availability of VS/PE-O parsing. v2->v3 - remove unnecessary braces from if blocks Signed-off-by: Michał Grzelak <[email protected]> --- drivers/gpu/drm/i915/display/intel_bios.c | 33 ++++++++++++++++++- .../drm/i915/display/intel_ddi_buf_trans.h | 10 +++--- 2 files changed, 37 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index b2ee556e9d1f3..2328429b562df 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -2187,6 +2187,30 @@ parse_compression_parameters(struct intel_display *display) } } +static void +parse_vswing_preemph_lt(union intel_ddi_buf_trans_entry **bufs_mtrx, + const struct bdb_vswing_preemph *block) +{ + union intel_ddi_buf_trans_entry *entry; + const u32 *tables = block->tables; + u8 num_rows = 16; + size_t offset = 0; + const u32 *vals; + + for (int idx = 0; idx < block->num_tables; idx++) { + for (int row = 0; row < num_rows; row++) { + vals = &tables[offset]; + + entry = &bufs_mtrx[idx][row]; + entry->lt.main_cursor = vals[0]; + entry->lt.pre_cursor = vals[1]; + entry->lt.post_cursor = vals[2]; + + offset += block->num_columns; + } + } +} + static void parse_vswing_preemph_override(struct intel_display *display) { @@ -2210,7 +2234,10 @@ parse_vswing_preemph_override(struct intel_display *display) for (int idx = 0; idx < block->num_tables; idx++) bufs_mtrx[idx] = kzalloc_objs(**bufs_mtrx, num_rows); - drm_dbg_kms(display->drm, "VS/PE-O parsing not yet supported\n"); + if (HAS_LT_PHY(display)) + parse_vswing_preemph_lt(bufs_mtrx, block); + else + drm_dbg_kms(display->drm, "VS/PE-O parsing not yet supported\n"); display->vbt.vspeo.bufs_mtrx = bufs_mtrx; display->vbt.vspeo.num_tables = block->num_tables; @@ -2659,6 +2686,7 @@ static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata, static void override_vswing_preemph(struct intel_bios_encoder_data *devdata) { + struct intel_display *display = devdata->display; struct intel_ddi_buf_trans *buf_trans; bool parseable = false; @@ -2667,6 +2695,9 @@ static void override_vswing_preemph(struct intel_bios_encoder_data *devdata) if (!intel_bios_encoder_overrides_vswing(devdata)) return; + if (HAS_LT_PHY(display)) + parseable = true; + if (!parseable) return; diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h index ac9acdec6d298..bc4bc80ba6588 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h @@ -51,11 +51,11 @@ struct dg2_snps_phy_buf_trans { }; struct xe3plpd_lt_phy_buf_trans { - u8 main_cursor; - u8 pre_cursor; - u8 post_cursor; - u8 txswing; - u8 txswing_level; + u32 main_cursor; + u32 pre_cursor; + u32 post_cursor; + u32 txswing; + u32 txswing_level; }; union intel_ddi_buf_trans_entry { -- 2.45.2
