> Subject: [PATCH v3 16/31] drm/i915/bios: shrink all LT's VS/PE tables
> 
> Each value present in LT's VS/PE-O table is stored on u32. In order to match
> values' size this causes xe3plpd_lt_phy_buf_trans to increase it's size.
> 
> Nevertheless, the actual value from each LT's VS/PE-O table is fully encoded 
> in
> the lowest byte. Extract the lowest byte by casting to u8 and using it as
> deparsed value. This way there is no need to inflate default tables.

Once again don’t break patch in such a way that you undo something that one of 
your previous patch was doing.
Squash with previous  patch.

Regards,
Suraj Kandpal

> 
> Signed-off-by: Michał Grzelak <[email protected]>
> ---
>  drivers/gpu/drm/i915/display/intel_bios.c          |  6 +++---
>  drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h | 10 +++++-----
>  2 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 2328429b562df..1b14cffe641ae 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -2202,9 +2202,9 @@ parse_vswing_preemph_lt(union
> intel_ddi_buf_trans_entry **bufs_mtrx,
>                       vals = &tables[offset];
> 
>                       entry = &bufs_mtrx[idx][row];
> -                     entry->lt.main_cursor = vals[0];
> -                     entry->lt.pre_cursor = vals[1];
> -                     entry->lt.post_cursor = vals[2];
> +                     entry->lt.main_cursor = (u8) vals[0];
> +                     entry->lt.pre_cursor = (u8) vals[1];
> +                     entry->lt.post_cursor = (u8) vals[2];
> 
>                       offset += block->num_columns;
>               }
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
> b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
> index bc4bc80ba6588..ac9acdec6d298 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
> +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
> @@ -51,11 +51,11 @@ struct dg2_snps_phy_buf_trans {  };
> 
>  struct xe3plpd_lt_phy_buf_trans {
> -     u32 main_cursor;
> -     u32 pre_cursor;
> -     u32 post_cursor;
> -     u32 txswing;
> -     u32 txswing_level;
> +     u8 main_cursor;
> +     u8 pre_cursor;
> +     u8 post_cursor;
> +     u8 txswing;
> +     u8 txswing_level;
>  };
> 
>  union intel_ddi_buf_trans_entry {
> --
> 2.45.2

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