From: Ville Syrjälä <[email protected]> We already changed the actual cdclk frequency by the time we do the pcode post notify. So skipping the subsequent readout is plain wrong.
Signed-off-by: Ville Syrjälä <[email protected]> --- drivers/gpu/drm/i915/display/intel_cdclk.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index 189ae2d3cfc9..9ca56bab281f 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -2301,12 +2301,10 @@ static void bxt_set_cdclk(struct intel_display *display, HSW_PCODE_DE_WRITE_FREQ_REQ, cdclk_config->voltage_level, 2); } - if (ret) { + if (ret) drm_err(display->drm, "PCode CDCLK freq set failed, (err %d, freq %d)\n", ret, cdclk); - return; - } intel_update_cdclk(display); -- 2.53.0
