From: Ville Syrjälä <[email protected]> We're currently skipping the pcode notifies on DG2 if the CDCLK isn't changing while the power well counts would still need updating. Do the pcode notifications also for pure pipe power well changes.
Signed-off-by: Ville Syrjälä <[email protected]> --- drivers/gpu/drm/i915/display/intel_cdclk.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index d60b3369b4d2..7259048361a7 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -2793,7 +2793,9 @@ intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state) return; if (!intel_cdclk_changed(&old_cdclk_state->actual, - &new_cdclk_state->actual)) + &new_cdclk_state->actual) && + dg2_power_well_count(display, old_cdclk_state) == + dg2_power_well_count(display, new_cdclk_state)) return; if (new_cdclk_state->disable_pipes) { @@ -2848,7 +2850,9 @@ intel_set_cdclk_post_plane_update(struct intel_atomic_state *state) return; if (!intel_cdclk_changed(&old_cdclk_state->actual, - &new_cdclk_state->actual)) + &new_cdclk_state->actual) && + dg2_power_well_count(display, old_cdclk_state) == + dg2_power_well_count(display, new_cdclk_state)) return; if (!new_cdclk_state->disable_pipes && -- 2.53.0
