Move WaDisablePartialInstShootdown and WaDisableThreadStallDopClockGating
Signed-off-by: Arun Siluvery <[email protected]>
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 18 ++++++------------
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index a06788a..5d15e31 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -807,6 +807,12 @@ static int gen8_init_workarounds(struct intel_engine_cs
*ring)
WA_SET_BIT_MASKED(INSTPM, INSTPM_FORCE_ORDERING);
+ /* WaDisablePartialInstShootdown:bdw,chv */
+ /* WaDisableThreadStallDopClockGating:chv, bdw (pre-production) */
+ WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
+ PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE |
+ STALL_DOP_GATING_DISABLE);
+
/* WaDisableAsyncFlipPerfMode:bdw,chv */
WA_SET_BIT_MASKED(MI_MODE, ASYNC_FLIP_PERF_DISABLE);
@@ -826,12 +832,6 @@ static int bdw_init_workarounds(struct intel_engine_cs
*ring)
if (ret)
return ret;
- /* WaDisablePartialInstShootdown:bdw */
- /* WaDisableThreadStallDopClockGating:bdw (pre-production) */
- WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
- PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE |
- STALL_DOP_GATING_DISABLE);
-
/* WaDisableDopClockGating:bdw */
WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
DOP_CLOCK_GATING_DISABLE);
@@ -888,12 +888,6 @@ static int chv_init_workarounds(struct intel_engine_cs
*ring)
if (ret)
return ret;
- /* WaDisablePartialInstShootdown:chv */
- /* WaDisableThreadStallDopClockGating:chv */
- WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
- PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE |
- STALL_DOP_GATING_DISABLE);
-
/* Use Force Non-Coherent whenever executing a 3D context. This is a
* workaround for a possible hang in the unlikely event a TLB
* invalidation occurs during a PSD flush.
--
1.9.1
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