Re: 440BX-Board (GA-6BXS) and SDRAM initialisation ...

[Eric W. Biederman]

Ronald G Minnich <[EMAIL PROTECTED]> writes:

> On 12 Feb 2001, Eric W. Biederman wrote:
> 
> > We should enable MTRR's for the RAM being tested in the RAM test.
>             ^^^^^^^ disable? don't you want the writes to go to ram, not
> be cached?

I want Write-Combining to be enabled.  This is still uncached but enables
the write buffers so that you get burts to/from memory.  

Eric