Jeremy Jackson <[EMAIL PROTECTED]> writes:
> Ronald G Minnich wrote:
>
> > On Mon, 12 Feb 2001 [EMAIL PROTECTED] wrote:
> >
> > > This sounds like the "right thing". RAMTEST with no cache is
> > > SSSSLLLOOOOWWWWWWWWW! ...and doesn't test burst.
> >
> > OK, we'll have to put that MTRR WC change in ...
> >
> > ron
>
> A question about ramtest... will simple scan test all possible access
> patterns that may be seen in actual code?
> I mean, if cache misses always generate natuarlly aligned 32 byte
> sequential reads, bursting won't occur
> across a cache line boundary, or will it? What about WC writes... does
> anyone ever bother to analyze
> at this level?
All the current ramtest is good for (with the appropriate caching)
is to make certain the memory timing issues are o.k.
The test is not to test ram so much as to make certain we set the
ram up o.k. for writes..
Eric
