Roland Scheidegger wrote:
> Alex Deucher wrote:
>> IIRC, radeons don't really have the limit either, I think the
>> buffersize size stuff is a vestage of some past wrong...  Didn't
>> Roland look into some buffersize issues a while back?  I could be way
>> off though...
> Well, the radeon/r200 chips don't really have a hw limit neither, but 
> the driver sure does. Trouble is, vertex array data is put into the 
> vertex/indirect buffers, and those are 64k a piece - that's good enough 
> for an array size up to 4096 (float4) entries (actually the driver 
> currently doesn't set this limit (Const.MaxArrayLockSize), it probably 
> should, but the default of 3000 works too). There are other limits 
> currently too, for instance the indices are only 16 bits, and you can 
> only emit somewhat below 32k of them at once (or below 16k if you'd use 
> 32bit indices, though 32bit indices might be r200 only). This is 
> actually afaik a hard limit of r100 chips, r200 could do the same as 
> r300, with putting the indices into a separate buffer.

I think this makes a clear point as to how we should progress.  Firstly, 
finish up this vbo work just because it is almost done and an enabler 
for other stuff.

Secondly, we want to get the drivers onto TTM asap.  In the first 
instance, we may want to do this for batchbuffer and VBO handling rather 
than textures/PBO's, because the TTM memory manager is currently 
restricted to AGP only and can't yet do the full job for r200/r300.  But 
we can make a start and at least get proper VBO behaviour and optimizations.

A VRAM-aware memory manager will happen in the near future, but this is 
something that the drivers can progress with straight away.

Keith


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