> Well, I think it is a matter of negotiation between the VHDL-coders.
> Personally, I didn't like the agreement proposed by Tsujikawa.
> And there is another problem: my design methodology is based in "chip
> replacement", and Tsujikawa's methodology consists in "creating new
> boards". This method is much more difficult for debugging, and testing
> each "chip-replacement" becomes impossible, because they are not
> pin-compatible with the original ones.
>
> If we can choose an standardized design methodology, I think we can
> exchange our codes. My VHDL coding-style is technology-independent, which
> means that one can use it for implementing in Xilinx FPGAs, in Altera
> FPGAs, and also for ASIC fabrication. AFAIK, as I saw in Kunihiko's VDP
> code, I could not connect it directly in place of the original VDP.
Ah. Heh, it's great to actually have direct communication with one of the
VHDL coders out there, since contact with all others has to go through other
people :). I just re-read the MSX print, and the part about the cooperation
was even directed directly at you, Marco... hehe ^_^ didn't notice that
before. And hmm 500.000 yen, that would be er... over 4000 euros! whow
that's a lot :). Oh, on a sidenote, I mentioned there being five different
VHDL coders working on MSX projects, but that would actually be four, the
one working on the TMS9918 was also from ESE. So there's two from Brazil,
one from Spain, and one from Japan...
As for the Japanese 'attitude' Adriano mentioned, English is a difficult
language for the Japanese, and their culture is also quite difficult, which
makes translating even harder if you want to stay close to the original
meaning. I think the fact that they offered to cooperate meant that they
*do* appreciate your skills (if they didn't, there wouldn't be a point in
asking for cooperation), and I don't think it should be discarded too fast.
There also have been several occasions where Japanese people felt severely
offended by contacts from the 'western' side, so it's definately not only
our problem.
You mention a standardized design method. Now I don't know how VHDL works
exactly, but wouldn't it be rather easy (at least compared to the chip's
function programming) to change the pin layout? Or is it like, perhaps, that
the Japanese design is too different, but that they may have more room for
future extensions??? In any case, I personally would prefer it both ways,
replacements for old chips (in case they break down) aswell as all-in-one,
extendible chips, with which a new ('one-chip') MSX can be made, or with
which Padial's Z380+EV4 can be turned into a fully functional 32-bit MSX.
That would be like, *cool* ^_^. I think with your design methodology that
would be possible, because it's technology-independent?
So, I definately hope the negociations work out. Even though I don't know
shit about VHDL programming (well I looked in to it once, actually, but I
don't recall much of it) a technology-independent approach sounds promising,
so I definately hope you will come up with a standardized design method. In
the end, because it is created by several people with different approaches
and programming styles it will probably also turn out to be the best method
because I think it'll be flexible and been thought through thoroughly.
Greetings from Holland ;p
~Grauw
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