On Tue, 27 Aug 2002, Laurens Holst wrote:
> > If we can choose an standardized design methodology, I think we can
> > exchange our codes. My VHDL coding-style is technology-independent, which
> > means that one can use it for implementing in Xilinx FPGAs, in Altera
> > FPGAs, and also for ASIC fabrication. AFAIK, as I saw in Kunihiko's VDP
> > code, I could not connect it directly in place of the original VDP.
>
> Ah. Heh, it's great to actually have direct communication with one of the
> VHDL coders out there, since contact with all others has to go through other
> people :). I just re-read the MSX print, and the part about the cooperation
I agree, and it seems that this is one of the barriers of the japanese
people for exchanging knowledge and sw/hw developments.
> was even directed directly at you, Marco... hehe ^_^ didn't notice that
> before. And hmm 500.000 yen, that would be er... over 4000 euros! whow
I didn't notice that, I will read it again. Is this MSX-Print available at
Alex Wulms' page?
> that's a lot :). Oh, on a sidenote, I mentioned there being five different
> VHDL coders working on MSX projects, but that would actually be four, the
> one working on the TMS9918 was also from ESE. So there's two from Brazil,
> one from Spain, and one from Japan...
One thing that is not clear for me is if Kunihiko is a member of ESE or
not. And also, if the ESE FPGA project belongs to the MSX Association or
not. Personally, I think that if the MSX Association wants to make money
with the hardware developed by Tsujikawa, then I also want. For me it's
not clear what is the goal of ESE.
> As for the Japanese 'attitude' Adriano mentioned, English is a difficult
> language for the Japanese, and their culture is also quite difficult, which
> makes translating even harder if you want to stay close to the original
> meaning. I think the fact that they offered to cooperate meant that they
> *do* appreciate your skills (if they didn't, there wouldn't be a point in
> asking for cooperation), and I don't think it should be discarded too fast.
In fact, it is not discarded, but it is not confirmed. I am still thinking
about it, and as I don't work alone in the FPGA projects, I can't decide
by myself. I will ask for opinion of the other guys who helped me.
> There also have been several occasions where Japanese people felt severely
> offended by contacts from the 'western' side, so it's definately not only
> our problem.
I don't remember any of these situations, but that's not the point,
because we don't feel offended, I don't see any problem in the japanese's
proposal. But this doesn't imply that it is an excelent agreement.
As you said, I also prefer to talk directly to the hardware guys. The fact
that the japanese language is too far different from the others is not an
excuse for learning English, for example. If they were able to develop the
best electronic products, why can't they develop communication skills?
> You mention a standardized design method. Now I don't know how VHDL works
> exactly, but wouldn't it be rather easy (at least compared to the chip's
> function programming) to change the pin layout? Or is it like, perhaps, that
The pin layout (the official name is "Pin Assignment") is easy to change
and is not informed in the VHDL code. Each FPGA model you use have
different available pin numbers, and the user has to select them,
according to the board layout (or schematic diagram) used by the circuit
board where the FPGA is installed.
> the Japanese design is too different, but that they may have more room for
> future extensions??? In any case, I personally would prefer it both ways,
When I talk abaout Japanese design, my basis is Kunihiko's code, which I
got from a Japanese webpage. That code is an example of a code which is
difficult to expand.
> replacements for old chips (in case they break down) aswell as all-in-one,
> extendible chips, with which a new ('one-chip') MSX can be made, or with
> which Padial's Z380+EV4 can be turned into a fully functional 32-bit MSX.
I prefer the "chip-replacement" design because it is very easy for
integrating them in an entire new board, using only one big FPGA. The
opposite is not valid, breaking a new design (made for new boards) into
the separeted chips for testing in a traditional MSX is much more
difficult. And the debugging is even worse.
> That would be like, *cool* ^_^. I think with your design methodology that
> would be possible, because it's technology-independent?
Yes. In the lab, I am using Xilinx FPGAs because its CAD software is much
more easier than Altera one, and the result can be more optimized, but not
hinders that the same code be implemented in Altera FPGAs. In fact, none
of the CAD tools (Altera or Xilinx) implements all the VHDL structs and
features, but they have a common core. I always write VHDL code that stays
using only this common core, which guarantees the portability. I don't
know if the Japanese hardware guys do the same, but I know that they are
using Altera chips and synthesis tools.
> So, I definately hope the negociations work out. Even though I don't know
> shit about VHDL programming (well I looked in to it once, actually, but I
First of all, VHDL is not a programming language. Remember that!
VHDL is one kind of hardware description language, which everyone can use
instead of the huges schematic diagrams. Can you imagine the size of the
schematic diagram of the entire Z80? In VHDL it becomes "readable".
> don't recall much of it) a technology-independent approach sounds promising,
> so I definately hope you will come up with a standardized design method. In
> the end, because it is created by several people with different approaches
> and programming styles it will probably also turn out to be the best method
> because I think it'll be flexible and been thought through thoroughly.
Yes, that's what I think. If somebody wants, I can explain what is the
basis of my coding style.
Greetings from Brazil
-----------------------------------------------------------
Marco Antonio Simon Dal Poz http://www.lsi.usp.br/~mdalpoz
[EMAIL PROTECTED] "old Fords never die, just get better"
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