On 21 Dec 2010, at 23:06, jb-electronics wrote:
I am programming the PIC with master clear disabled, as well as
internal 4MHz RC oscillator enabled.
Jens
I used to have this problem with the JDM programmer. If a PIC had
been previously programmed to use the internal oscillator with MCLR
off, it would start to run its program as soon as VDD is applied, it
never gets a chance to be reprogrammed and won't be reset via the
MCLR pin. VDD needs to be delayed until after VPP is applied.
http://forum.velleman.eu/viewtopic.php?f=4&t=1820&p=6808 seems to
discuss the issue.
You may be able to add a delay for VDD using an opto-isolator or
something. I am sure the others will suggest a better way.
John S
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