I've used the main CPU as the switching regulator in just about all my HV 
projects, and I can tell you exactly how to go about it. A word of warning, 
though - the STM chip is 3.3V VCC. That is exceedingly marginal for turning 
on even a logic level FET of the rating you need. You should probably 
choose a different processor. Anyway, to the technique.

Choose a timer for PWM. It needs two compare registers, one for setting the 
maximum count (A) and one for toggling an output (B). Most CPUs have this. 
Set it up for a free running frequency of at least 30kHz - that is, it runs 
from 0 to max count and resets in 30us. 40kHz is better (25us). It doesn't 
need many bits - 8 bits is fine for this job. Example, if you have an 8 bit 
counter clocked at 8MHz, the modulus (maximum count, 'A' compare register) 
would be 200 for 40kHz. Set this value in the A register and a low value, 
like 1, in the B register. This gives you a soft start.

The pin toggled by the B comparator should be settable as input or output. 
Connect this pin to the FET gate with a 2.2k pulldown resistor. When the 
pin is set as input, this should pull down close to ground to keep the FET 
off. After reset, start off with this pin as input.

Choose an ADC channel and input, and connect through a resistor divider to 
the HV output. Calculate what the ADC reading will be at the desired 
voltage - this will depend on the reference voltage, the resistor values, 
etc. Set the ADC going in free run, with an interrupt on conversion 
complete.

In your ADC interrupt routine, compare the ADC reading to the setpoint you 
calculated. If it is below, increment the counter 'B' compare register by 
1, up to about 80% of the top value you set in the 'A' compare register. 
Don't go past that point! The FET needs some off time to discharge the 
inductor. Then set the PWM pin as an output. If the ADC reading is above 
the setpoint, decrement the 'B' compare by 1 and set the PWM pin as input, 
to turn off the FET. If it is equal, do nothing. When starting out from 
nothing you may need to limit the B register to less than 80% of A, to 
limit the current. I start mine out with a 25% limit and change that to 80% 
when the voltage comes up above 75%. At low voltage there's no load so it 
comes up quickly even with a low duty cycle.

For 20-30kHz, you need about a 220 to 270 microhenry inductor with a 
saturation current of 1A or more. The IRF640 is a suitable driver. You'll 
find there's a limited choice of high voltage FETs with a logic level gate. 
A technique I've been using for some time is to use a center tapped 
inductor with the FET attached at the center tap. That way it only 
experiences half the HV pulse.

The only problem I have with this system is when I'm debugging and stop at 
a break point. Because the PWM is completely asynchronous there's a good 
chance the processor halts with the FET turned on, and things quickly get 
quite warm. I find it expedient to put a jumper in the FET gate that I can 
remove to shut down the HV. Most of the time when I'm debugging I don't 
need the tubes lit anyway. For the finished clock no doubt you'll have a 
watchdog timer, and the first thing that will do when it trips is turn off 
the PWM port.

If you had a 5V processor you could use the HV5530 with a VCC of 5V and no 
level shifting. It works perfectly well at 5V for nixie currents, but not 
at full speed - the clock timing is about 4 times longer. I've tried it at 
3.3V though and it's no go.


On Tuesday, June 9, 2015 at 5:54:56 PM UTC-7, Brian wrote:
>
> I do have a scope, via work.  I know a little about switching converter 
> design, but I've never had to design one at this level.  Getting the 
> converter right is the main reason I am doing this small board before 
> jumping fully into the project.  Hopefully I can lean on you guys a little 
> until I get it right! 
>
> -Brian

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