On 7/20/06, James Richard Tyrer <[EMAIL PROTECTED]> wrote:
> OGD1 comes with 256MiB. I presume that the bus width on OGC will be the same. So, are we going to use "eight 128 megabit chips" on the OGC to have a 128 bit buss?
256MiB is relatively cheap. Only power-consumption is any reason to use fewer chips. We should ensure OGA-based designs can use 1, 2, or 4 memory controllers (i.e. pairs of chips), making the configurable bus widths 32, 64, or 128 bits. We should also support 32-bit wide chips if we can, but if we can't adequately test that, it'll be considered an unsupported feature unless we find it works perfectly on the ASIC. We should spec OGA internally to have an address space of like 1GiB so that it's somewhat scalable, but this is an after-thought. _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
