On Mon, 08 Jan 2018 17:35:29 +0100, Matthias Welwarsky wrote:

> On Montag, 8. Januar 2018 16:53:39 CET acala...@free.fr wrote:
>> Hello and Happy new year!
>> 
>> I am currently implementing OpenOCD support for the xPC56 microcontrollers,
>> but I am facing some difficulties. These MCUs are developed by
>> NXP/Freescale (MPC56xx) and STM (SPC56x) and based on a PowerPC E200 core.
> 
> [snip]
> 
>> So I am wondering, is supporting this kind of architecture is part of the
>> roadmap? Could I get some help to find an elegant way to adapt it with
>> current OpenOCD design?
> 
> I don't think that there is anything like that on the roadmap, simply because 
> a formal roadmap doesn't exist. If you're looking into supporting these MCUs, 
> the right approach is to implement your own "jtagc" tap infrastructure, it's 
> certainly not recommended trying to shoehorn that into the current jtag tap 
> code. You'll need to write your own access primitives using bare JTAG scan 
> commands, those will probably be the correct level of abstraction.

on the other hand, it should not be that hard:

1) openocd already contains nexus support, even incomplete and for
   another architecture, avr32, i tested that it doesn't work properly
   probably from same reason.
   
2) tap structure has pointer to dap, this is used during target
   initialization (see dap_init() in cortex_a.c, cortex_m.c and
   aarch64.c) which offers possibility to be used more generaly.


> 
> Best regards,
> Matthias
> 
>> 
>> Regards,
>> Antoine
>> 
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