On 13.03.2018 19:04, Christopher Head wrote:
OK, here are my test results. All are taken on a JTAG chain with two STM32F745 
chips, using an Olimex ARM-USB-TINY-H. In all cases the data is written to the 
second chip in the chain and is 473 kilobytes using the command “flash 
write_bank 1 filename.bin”. In all cases the default clock is used, so 2000 on 
tests without your patch and 8000 with it. In all cases where the write was 
successful, I also did a verify and it passed. If I didn’t mention how many DAP 
WAITs I saw in a particular case, it means there were none. In no case did I 
muck with the DAP memaccess setting.

=== Commit b8c7232b ===
Reset init: no DAP WAITs.

With algorithm: 2 DAP WAITs followed by debug regions are unpowered.

Without algorithm: 2.900 kiB/s.

=== With only your patch from 4464 ===
Reset init: 8 DAP WAITs but it seems happy.

With algorithm: 120 DAP WAITs, 53.283 kiB/s.

Without algorithm: 4.135 kiB/s.

=== With only my patch from 4463 ===
Reset init: no DAP WAITs.

With algorithm: 2 DAP WAITs followed by debug regions are unpowered.

Without algorithm: 1 DAP WAIT, 35.239 kiB/s.

=== With both patches ===
Reset init: 8 DAP WAITs but it seems happy.

With algorithm: 122 DAP WAITs, 52.752 kiB/s.

Without algorithm: 1 DAP WAIT, 55.177 kiB/s.

Obviously faster DAP WAIT handling on USB HS.
The question remains: why are you getting DAP WAITs with algo, is the reason
different adapter FT2232H vs FT2232C (should not be different except
faster turnaround but...) or is it a difference between STM32F722 and F745 ?

Tom

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